IP Library Granted Patent US 8,289,669
Granted Patent B2
US 8,289,669 · App. 12/591,542 · Granted Oct 16, 2012

Semiconductor device including over voltage protection circuit having gate discharge circuit operated based on temperature and voltage as to output transistor

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Quick Facts
Patent No.
US 8,289,669
App. No.
12/591,542
Granted
Oct 16, 2012
Kind
B2
Abstract

A semiconductor device includes an output transistor which controls a power supply to a load according to a control voltage applied to a gate thereof, a voltage control circuit coupled between the gate and a drain of the output transistor, the voltage control circuit having a conduction state controlled according to a potential difference between a source and the drain of the output transistor, and a voltage control detection circuit which outputs a voltage control detection signal on a basis of the conduction state of the voltage control circuit. A first discharge switch is connected between the gate and the source of the output transistor, an on-off state of the first discharge switch being controlled according to the voltage control detection signal, a second discharge switch is series-connected to the first discharge switch between the gate and the source of the output transistor, an on-off state of the second discharge switch being controlled according to a temperature condition of the output transistor, and a third discharge switch is connected in parallel with the first and second discharge switches.

Claims (39)

1. A semiconductor device, comprising:

an output transistor which controls a power supply to a load according to a control voltage applied to a gate thereof;

a voltage control circuit coupled between the gate and a drain of the output transistor, the voltage control circuit having a conduction state controlled according to a potential difference between a source and the drain of the output transistor;

a voltage control detection circuit which outputs a voltage control detection signal on a basis of the conduction state of the voltage control circuit;

a first discharge switch comprising a conductive path that is configured to be connected between the gate and the source of the output transistor, an on-off state of the first discharge switch being controlled according to the voltage control detection signal;

a second discharge switch comprising a conductive path that is configured to be series-connected to the first discharge switch between the gate and the source of the output transistor, an on-off state of the second discharge switch being controlled according to a temperature condition of the output transistor; and

a third discharge switch comprising a conductive path that is configured to be connected between the gate and the source of the output transistor.

2. The semiconductor device according to claim 1 , wherein the voltage control circuit includes a zener diode and a diode connected to each other in series.

3. The semiconductor device according to claim 1 , wherein the voltage control detection circuit comprises a first transistor connected between the voltage control circuit and the drain of the output transistor and outputs the voltage control detection signal according to a voltage at a connection node of the first transistor and the voltage control circuit.

4. The semiconductor device according to claim 3 , wherein the first transistor includes a P channel type MOS transistor having a source connected to the drain of the output transistor, and a gate and a drain both connected to the voltage control circuit.

5. The semiconductor device according to claim 3 , wherein the voltage control detection circuit comprises an inverter circuit comprising:

an input terminal which receives a voltage at the connection node; and

an output terminal which outputs the voltage control detection signal.

6. The semiconductor device according to claim 1 , wherein the first, second and to third discharge switches each includes an N channel type MOS transistor.

7. The semiconductor device according to claim 1 , wherein a sum of resistance components of the first discharge switch and the second discharge switch is less than a resistance component of the third discharge switch.

8. The semiconductor device according to claim 1 , wherein the load is connected between a high-side power supply and the output transistor.

9. The semiconductor device according to claim 1 , wherein the load is connected between a low-side power supply and the output transistor.

10. The semiconductor device according to claim 1 , wherein the third discharge switch is connected in parallel with the first and second discharge switches.

11. The semiconductor device according to claim 1 , wherein the second discharge switch comprises an output that is connected to an input of the first discharge switch.

12. The semiconductor device according to claim 1 , wherein the first discharge switch comprises a gate that is connected to the voltage control detection circuit.

13. The semiconductor device according to claim 1 , wherein the voltage control detection circuit comprises a plurality of switches including a first transistor comprising a drain that is connected to a gate of the first discharge switch.

14. The semiconductor device according to claim 1 , further comprising a gate discharge circuit outputting a control signal to a gate of the third discharge switch.

15. The semiconductor device according to claim 14 , wherein the gate discharge circuit outputs a second control signal to a gate of the second discharge switch.

16. The semiconductor device according to claim 1 , further comprising a boost circuit, and the on-off state of the output transistor is controlled by a voltage boosted by the boost circuit.

17. The semiconductor device according to claim 1 , wherein, when a load anomaly in the output transistor is detected, the second discharge switch and the first discharge switch each enter a conductive state.

18. The semiconductor device according to claim 1 , wherein the first discharge switch and the second discharge switch are each configured to discharge an electric charge accumulated in the output transistor.

19. A semiconductor device, comprising:

an output transistor coupled between a first terminal and a second terminal;

a first transistor coupled between the first terminal and a first node;

a plurality of diodes coupled between the first node and a gate of the output transistor;

a second transistor having a conductive path between the gate of the output transistor and a second node, and controlled by a signal corresponding to a signal on the first node;

a third transistor having a conductive path between the second node and the second terminal, and controlled by a temperature information corresponding to the output transistor; and

a fourth transistor coupled between the gate of the output transistor and the second terminal, and controlled by the temperature information.

20. The semiconductor device, as claimed in claim 19 , further comprising:

a fifth transistor coupled between the first terminal and a third node, and including a gate thereof coupled to the first node;

a first resistor coupled to the third node and the second terminal;

a second resistor coupled between the first terminal and a fourth node; and

a sixth transistor coupled between the fourth node and the second terminal, and including a gate thereof coupled to the third node,

wherein the second transistor includes a gate thereof coupled to the fourth node.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025193/0147 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 23, 2009
From: NAKAHARA, AKIHIRO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 023603/0382 →