IP Library Patent Application 12594374
Patent Application
App. No. 12/594,374

ETCH METHOD IN THE MANUFACTURE OF A SEMICONDUCTOR DEVICE

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Patent No.
US None
App. No.
12/594,374
Abstract

The present invention provides a method for forming a transistor on a silicon substrate, the method comprising: providing a substrate comprising: a gate electrode with a liner comprising silicon and oxygen, and with a sidewall spacer, and source and/or drain region(s) in the substrate adjacent to the gate electrode, a layer at least 5 nm thick comprising silicon dioxide covering at least the source and/or drain regions; etching the layer comprising silicon and oxygen from at least the source and/or drain regions; and forming contacts for the source and/or drain region(s), characterized in that the layer comprising silicon and oxygen is etched from the substrate by steps comprising: forming an etchant from a plasma formed from a mixture comprising nitrogen trifluoride and ammonia; exposing the substrate to the etchant; and annealing the substrate.

Claims (45)

1 . A method for forming a transistor on a silicon substrate, the method comprising:

providing a substrate comprising a gate electrode with a liner comprising silicon and oxygen, and with a sidewall spacer, and source and/or drain region(s) in the substrate adjacent to the gate electrode, a layer at least 5 nm thick comprising silicon dioxide covering at least the source and/or drain regions;

etching the layer comprising silicon and oxygen from at least the source and/or drain regions; and

forming contacts for the source and/or drain region(s),

wherein etching the layer comprising silicon and oxygen is etched from the substrate by steps comprising comprises:

forming an etchant from a plasma formed from a mixture comprising nitrogen trifluoride and ammonia;

exposing the substrate to the etchant; and

annealing the substrate.

2 . The method according to claim 1 , wherein the source and/or drain contacts are formed by:

depositing a metal or metal alloy layer over the source and/or drain regions; and

annealing the substrate to form metal silicide source and/or drain contacts.

3 . The method according to claim 1 , wherein the source and/or drain contacts are formed from silicon, nickel, and optionally platinum.

4 . The method according to claim 1 , wherein etching the layer comprising silicon and oxygen comprises:

exposing the substrate to an etchant formed from a plasma formed from a mixture comprising nitrogen trifluoride and ammonia, and annealing the substrate;

followed by exposing the substrate again to an etchant formed from a plasma formed from a mixture comprising nitrogen trifluoride and ammonia, and annealing the substrate.

5 . The method according to claim 1 , wherein etching the layer comprising silicon and oxygen comprises:

etching the substrate with a hydrogen fluoride solution;

forming an etchant formed from a mixture comprising nitrogen trifluoride and ammonia; and

exposing the substrate to the etchant.

6 . The method according to claim 5 , wherein the etching with a hydrogen fluoride solution is carried out before exposing the substrate to an etchant formed from a gas mixture comprising nitrogen trifluoride and ammonia.

7 . The method according to claim 1 , wherein the layer comprising silicon and oxygen is less than 300 nm in thickness.

8 . The method according to claim 1 , wherein the plasma is formed at a power density of between 10 and 1000 mW/cm3.

9 . The method according to claim 1 , wherein the layer comprising silicon and oxygen is covered by a second layer comprising a nitride of silicon.

10 . The method according to claim 9 , wherein the layer comprising a nitride of silicon is from 5 to 50 nm in thickness.

11 . The method according to claim 1 , wherein the layer comprising silicon and oxygen is formed as a blanket layer over the surface of the substrate.

12 . The method according to claim 11 , wherein a layer that is stable to the conditions in the etching steps is formed over part of the blanket layer.

13 . The method according to claim 1 , wherein the layer comprising silicon and oxygen comprises an oxide of silicon, for example silicon dioxide.

14 . The use of an etchant formed from a plasma formed from a mixture comprising nitrogen trifluoride and ammonia in the prevention of undercutting of a sidewall spacer in etching of a layer comprising silicon and oxygen in the manufacture of a semiconductor device.

15 . (canceled)

16 . The method according to claim 2 , wherein the source and/or drain contacts are formed from silicon, nickel, and optionally platinum.

17 . The method according to claim 2 , wherein etching the layer comprising silicon and oxygen comprises:

exposing the substrate to an etchant formed from a plasma formed from a mixture comprising nitrogen trifluoride and ammonia, and annealing the substrate;

followed by exposing the substrate again to an etchant formed from a plasma formed from a mixture comprising nitrogen trifluoride.

18 . The method according to claim 3 , wherein etching the layer comprising silicon and oxygen, comprises:

exposing the substrate to an etchant formed from a plasma formed from a mixture comprising nitrogen trifluoride and ammonia, and annealing the substrate;

followed by exposing the substrate again to an etchant formed from a plasma formed from a mixture comprising nitrogen trifluoride.

19 . The method according to claim 2 , wherein etching the layer comprising silicon and oxygen comprises:

etching the substrate with a hydrogen fluoride solution;

forming an etchant formed from a mixture comprising nitrogen trifluoride and ammonia; and

exposing the substrate to the etchant.

20 . The method according to claim 3 , wherein etching the layer comprising silicon and oxygen comprises:

etching the substrate with a hydrogen fluoride solution;

forming an etchant formed from a mixture comprising nitrogen trifluoride and ammonia; and

exposing the substrate to the etchant.

21 . The method according to claim 2 , wherein the layer comprising silicon and oxygen is less than 300 nm in thickness.

Assignments (16)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037355/0723 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024079/0082 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2009
From: BRAECKELMANN, GREG; BONNETIER, SUSANA
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 023317/0906 →