Patent Assignment
Reel/Frame 037355/0723
Patent Release
Recorded: 2015-12-21
Pages: 15
Assignor
CITIBANK, N.A., AS COLLATERAL AGENT
Executed: 2015-12-07
Assignee
FREESCALE SEMICONDUCTOR, INC.
6501 WILLIAM CANNON DRIVE WEST, AUSTIN, TEXAS, 78735
Covered Properties
(195)
System and Method for Cryptographic Key Generation
Patent:
7,599,976 →
Application:
10/295,002 →
Method and Computer Program Product for Generation of Bus Functional Models
Power Management System
Linear Approximation of the Max* Operation for Log-Map Decoding
Data Processing System Using Independent Memory and Register Operand Size Specifiers and Method Thereof
Cellular Modem Processing
Network Message Filtering Using Hashing and Pattern Matching
Method and Apparatus for Dynamically Inserting Gain in an Adaptive Filter System
Method and Apparatus for Demodulating a Received Signal Within a Coded System
Regulation of a Dc to Dc Converter
Clocked Ramp Apparatus for Voltage Regulator Softstart and Method for Softstarting Voltage Regulators
Equalizer Co-Efficient Generation Apparatus and Method Therefor
Mechanical Integrity Evaluation of Low-K Devices with Bump Shear
Electronic Device Including Discontinuous Storage Elements
Process for Forming an Electronic Device Including Discontinuous Storage Elements
Fabrication of Three Dimensional Integrated Circuit Employing Multiple Die Panels
Mixing Module and Methods for Use Therewith
System and Method for Controlling Signal Transitions
Beamforming for Non-Collaborative, Space Division Multiple Access Systems
Method for Forming a Semiconductor Structure and Structure Thereof
Detecting an Infrared Transceiver Type
Plasma Treatment of a Semiconductor Surface for Enhanced Nucleation of a Metal-Containing Layer
Multiple Function Handheld Device
Floating Gate Non-Volatile Memory and Method Thereof
Epi T-Gate Structure for COSI2 Extendibility
Error Correction Device and Method Thereof
Noise Isolation Between Circuit Blocks in an Integrated Circuit Chip
Method and Apparatus for Indicating Directionality in Integrated Circuit Manufacturing
Rf Transmitter with Interleaved Iq Modulation
Non-Volatile Memory Having a Multiple Block Erase Mode and Method Therefor
Prioritization of Connection Identifiers for an Uplink Scheduler in a Broadband Wireless Access Communication System
Integrated Circuit Encapsulation and Method Therefor
Phase Detector Device and Method Thereof
Adjustable Automatic Gain Control
Selective Bit Error Detection at a Bus Device
Contact Surrounded by Passivation and Polymide and Method Therefor
Method for Forming a Semiconductor Device and Structure Thereof
In-Circuit Vt Distribution Bit Counter for Non-Volatile Memory Devices
Dc Offset Correction for Direct Conversion Receivers
Method of Forming a Bipolar Transistor and Semiconductor Component Thereof
Integrated Cmos and Bipolar Devices Method and Structure
Pipelined Data Processor with Deterministic Signature Generation
Current Comparison Based Voltage Bias Generator for Electronic Data Storage Devices
Programming a Memory Device Having Error Correction Logic
Mems Suspension and Anchoring Design
Mems Device and Method of Reducing Stiction in a Mems Device
Wireless Receiver for Removing Direct Current Offset Component
Processing System, Memory and Methods for Use Therewith
Superjunction Trench Device and Method
One Transistor Dram Cell Structure
Photon-Based Memory Device and Method Thereof
Memory Device Having Concurrent Write and Read Cycles and Method Thereof
Varactor
Transmitter with Improved Power Efficiency
Methods and Apparatus for a Dual-Metal Magnetic Shield Structure
Memory Cells with Lower Power Consumption During a Write Operation
Method of Packaging Semiconductor Devices
Dual Gate Ldmos Device Fabrication Methods
Differential Capacitive Sensor and Method of Making Same
Multiple Port Memory with Prioritized Word Line Driver and Method Thereof
Load Independent Voltage Regulator
Power Supply Selection for Multiple Circuits on an Integrated Circuit
Space and Process Efficient Mram and Method
Method and Apparatus for Providing Structural Support for Interconnect Pad While Allowing Signal Conductance
Low Pass Filter Low Drop-Out Voltage Regulator
Method and Device for Designing Semiconductor Integrated Circuit
Dynamic Voltage Adjustment for Memory
Method to Control Uniformity/Composition of Metal Electrodes, Silicides on Topography and Devices Using This Method
Non-High Impedence Device and Method for Reducing Energy Consumption
Speedpath Repair in an Integrated Circuit
Voltage Regulator for Integrated Circuits
System and Method for Reducing Power Consumption in a Low-Density Parity-Check (Ldpc) Decoder
Crystal Oscillator Circuit Having Fast Start-Up and Method Therefor
Digital Pulse Width Modulated Feedback System for a Switching Amplifier and Method Therefor
Compensation for Parasitic Coupling Between Rf or Microwave Transistors in the Same Package
Load Insensitive Balanced Power Amplifier and Related Operating Method
Circuit Having Logic State Retention During Power-Down and Method Therefor
Self Regulating Biasing Circuit
Power on Detection Circuit
Multi-Channel Transistor Structure and Method of Making Thereof
Voltage Multiplier with Improved Efficiency
Loop Gain Equalizer for Rf Power Amplifier
Gate Electrode Silicidation Process
Method and System for Performing Distance Measuring and Direction Finding Using Ultrawide Bandwitdh Transmissions
Method for Receiving and Recovering Frequency Shift Keyed Symbols
Superjunction Power Mosfet
Temperature Compensation Circuit, Trimming Circuit, and Acceleration Detector
Robust Deep Trench Isolation
Patent:
7,608,908 →
Application:
12/125,613 →
Pre-Driver for Bridge Circuit
Electronic Device Including an Inductor
Semiconductor Device Package with Integrated Stand-Off
Application:
12/577,722 →
Publication:
US 2011/0084375
Semiconductor Device Package with Down-Set Leads
Application:
12/577,730 →
Publication:
US 2011/0062569
Semiconductor Die
Application:
12/577,731 →
Publication:
US 2011/0084411
Lead Frame and Method of Forming Same
Application:
12/578,556 →
Publication:
US 2011/0065240
Substrate Noise Passive Cancellation Method for Buck Converter
Plasma Treatment of a Semiconductor Surface for Enhanced Nucleation of a Metal-Containing Layer
Flexible Memory Controller for Autonomous Mapping of Memory
Semiconductor Wafer Having Scribe Lane Alignment Marks for Reducing Crack Propagation
System and Method for Symbol Boundary Detection in Orthogonal Frequency Divison Multiplexing Based Data Communication
Method and System for Performing Distance Measuring and Direction Finding Using Ultrawide Bandwidth Transmissions
Method of Transmitting Data from a Transmitting Device
System and Method for Controlling a Wireless Device
Low Power, High Resolution Timing Generator for Ultra-Wide Bandwidth Communication Systems
Systems and Methods for Delivering Power in Response to a Connection Event
Application:
12/592,289 →
Publication:
US 2011/0121656
Methods and apparatus for performing capacitive touch sensing and proximity detection
Relating to Diagnostics of a Capacitive Sensor
Method, Data Structure and Computer System for Packing a Worlwide Interoperability for Microwave Access (Wimax) Frame
Etch Method in the Manufacture of a Semiconductor Device
Application:
12/594,374 →
Publication:
US 2010/0151677
Data Processing Control Unit for Controlling Multiple Data Processing Operations
Device and Method for State Retention Power Gating
Circuit, Integrated Circuit and Method for Dissipating Heat from an Inductive Load
Unified Memory Architecture and Display Controller to Prevent Data Feed Under-Run
Microcontroller Unit and Method Therefor
Semiconductor Wafer Processing
Integrated Circuit, Electronic Device and Esd Protection Therefor
Power Supply Controller for Multiple Lighting Components
Method and Apparatus for Designing an Integrated Circuit
Application:
12/597,034 →
Publication:
US 2010/0122224
Diagnosis for Mixed Signal Device for Use in a Distributed System
Esd Protection Device and Method of Forming an Esd Protection Device
Video Processing System, Integrated Circuit, System for Displaying Video, System for Generating Video, Method for Configuring a Video Processing System, and Computer Program Product
Digital Squib Driver Circuit
System and Method for Secure Real Time Clocks
Generating a Frame of Audio Data
Improvements in or Relating to Integrated Circuit Reliability
Power Lead-on-Chip Ball Grid Array Package
Data Processing System, Data Processing Method, and Apparatus
Wireless Communication Unit, Baseband Module, Radio Frequency Module, Wireless Terminal and Computer Program Product
Data Processing System, Method for Processing Data and Computer Program Product
Integrated Circuit, Wireless Communication Unit and Method for Determining Quadrature Imbalance
Device and Method for Transmitting Data in a Wideband Wireless Network and Computer Program Product
Wireless Communication Unit
Improving Test Pattern Coverage Through Parallel Discard, Flow Control, and Quality Metrics
Non-Planar Semiconductor Device Comprising Current Electrodes and a Fin Including Silicon Germanium
Application:
12/605,556 →
Publication:
US 2010/0044762
Cellular Modem Processing
Method of Fast Tracking and Jitter Improvement in Asynchronous Sample Rate Conversion
Package for High Power Integrated Circuits and Method for Forming
Shielded Multi-Layer Package Structures
Linear Regulator with Automatic External Pass Device Detection
Method and Apparatus for Activiating System Components
Flip-Flop Having Shared Feedback and Method of Operation
Data Latch with Structural Hold
Patent:
7,843,218 →
Application:
12/607,657 →
Threshold Voltage Techniques for Detecting an Imminent Read Failure in a Memory Array
Time-Based Techniques for Detecting an Imminent Read Failure in a Memory Array
Interconnect Controller for a Data Processing Device with Transaction Tag Locking and Method Therefor
Non-Volatile Memory Controller Device and Method Therefor
One-Time Programmable Memory Device and Methods Thereof
Semiconductor Device with Increased Snapback Voltage
Molded Semiconductor Package Having a Filler Material
Vertically Integrated Mems Sensor Device with Multi-Stimulus Sensing
Semiconductor Device with Feedback Control
Trace Reconstruction for Silicon Validation of Asynchronous Systems-On-Chip
Integrated Circuit Encapsulation and Method Therefor
Adjustable Clamp System and Method for Wire Bonding Die Assembly
Hash Function for Hardware Implementations
Semiconductor Device and Method for Manufacturing Same
Application:
12/613,543 →
Publication:
US 2010/0187526
Method and Apparatus for Indicating Directionality in Integrated Circuit Manufacturing
Semiconductor Device Package
Regulator with Pulse Width Modulation Circuit
Application:
12/617,732 →
Publication:
US 2010/0194362
Method and Apparatus for Molding Substrate
Method and Apparatus for Video Decoding with Reduced Complexity Inverse Transform
Application:
12/617,902 →
Publication:
US 2011/0116539
Multi-Core System on Chip
Charge Pump for Use with a Synchronous Load
Apparatus and Methods for Applying Stress-Induced Offset Compensation in Sensor Devices
Memory Device Having Shifting Capability and Method Thereof
Via Definition for Semiconductor Die
Sensing Circuit for Semiconductor Memory
Application:
12/620,539 →
Publication:
US 2010/0208538
Four Stroke Single Cylinder Combustion Engine Starting System
System Having Multiple Voltage Tiers and Method Therefor
System and Method for Communicating Between Multiple Voltage Tiers
Method and Detector for Determining a State of a Switch
Output Driver Circuits for Voltage Regulators
Semiconductor Device with High K Dielectric Control Terminal Spacer Structure
Integrated Circuit Having Low Power Mode Voltage Retulator
High Gain Tunable Bipolar Transistor
Method for Releasing a Microelectronic Assembly from a Carrier Substrate
Electronic Apparatus Interconnect Routing
Flip-Flop Circuit with Internal Level Shifter
Method of Reading Memory Cell
Application:
12/624,403 →
Publication:
US 2010/0202221
Synchronized Phase-Shifted Pulse Width Modulation Signal Generation
Systems and Methods for Detecting Interference in an Integrated Circuit
Voltage Reference Circuit
Programmable Clock Divider
Laterally Integrated Mems Sensor Device with Multi-Stimulus Sensing
Methods for Fabricating Semiconductor Devices Having Reduced Gate-Drain Capacitance
Method and System for High-Speed Detection Handshake in Universal Serial Bus Based Data Communication System
Digital Adaptive Feedforward Harmonic Distortion Compensation for Digitally Controlled Power Stage
Network File Update Mechanism with Integrity Assurance
Method of Forming a Micro-Electromechanical System (Mems) Having a Gap Stop
Low Power Charge Pump and Method of Operation
Electrical Coupling of Wafer Structures
Electronic Device with a Gate Electrode Having at Least Two Portions
Semiconductor Device with Selectively Modulated Gate Work Function
Electronic Device Including Trenches and Discontinuous Storage Elements
Circuit Arrangement for Filtering Unwanted Signals from a Clock Signal, Processing System and Method of Filtering Unwanted Signals from a Clock Signal
Coupling Layer Composition for a Semiconductor Device, Semiconductor Device, Method of Forming the Coupling Layer, and Apparatus for the Manufacture of a Semiconductor Device
Application:
12/665,070 →
Publication:
US 2010/0200995
Related Assignments
(25)
Other recorded transfers of the patents in this record — the chain of ownership.
Security Agreement
Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
Security Agreement
Nov 12, 2013
From: SIGMATEL, LLC
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031626/0218 →
Patent Release
Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
Patent Release
Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
Patent Release
Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
Patent Release
Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037354/0734 →
Patent Release
Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037354/0773 →
Patent Release
Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037355/0838 →
Assignment and Assumption of Security Interest in Patents
Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
Assignment and Assumption of Security Interest in Patents
Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
Assignment of Assignor's Interest
Jan 25, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037567/0531 →
Assignment of Assignor's Interest
Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
Security Agreement Supplement
Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
Supplement to the Security Agreement
Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
Corrective Assignment to Correct the Remove Application 12092129 Previously Recorded on Reel 038017 Frame 0058. Assignor(S) Hereby Confirms the Security Agreement Supplement.
Jul 14, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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Corrective Assignment to Correct the Assignee Name Previously Recorded at Reel: 037354 Frame: 0773. Assignor(S) Hereby Confirms the Patent Release.
Aug 15, 2016
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, LLC
Reel/Frame 039723/0777 →
Patent Release
Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
Release of Security Interest
Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
Release of Security Interest
Nov 7, 2016
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To: NXP B.V.
Reel/Frame 040928/0001 →
Change of Name
Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
Corrective Assignment to Correct the Nature of Conveyance Listed Change of Name Should Be Merger and Change Previously Recorded at Reel: 040652 Frame: 0180. Assignor(S) Hereby Confirms the Merger and Change of Name.
Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
Corrective Assignment to Correct the Remove Patents 8108266 and 8062324 and Replace Them with 6108266 and 8060324 Previously Recorded on Reel 037518 Frame 0292. Assignor(S) Hereby Confirms the Assignment and Assumption of Security Interest in Patents.
Feb 1, 2017
From: CITIBANK, N.A.
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Assignment of Assignor's Interest
Feb 15, 2017
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Corrective Assignment to Correct the Remove Application 12681366 Previously Recorded on Reel 038017 Frame 0058. Assignor(S) Hereby Confirms the Security Agreement Supplement.
May 9, 2017
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Corrective Assignment to Correct the Remove Application 12681366 Previously Recorded on Reel 039361 Frame 0212. Assignor(S) Hereby Confirms the Security Agreement Supplement.
May 9, 2017
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