IP Library Granted Patent US 8,341,443
Granted Patent B2
US 8,341,443 · App. 12/599,126 · Granted Dec 25, 2012

System and method for secure real time clocks

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,341,443
App. No.
12/599,126
Granted
Dec 25, 2012
Kind
B2
Abstract

A secure real time clock (RTC) system is provided, comprising a secure RTC, a frequency signal generator, and a frequency adjuster connected between the secure RTC and the frequency signal generator to receive a signal having a first frequency from the frequency signal generator. On receipt of a first control signal the frequency adjuster outputs the signal having the first frequency to the secure RTC, and on receipt of a second control signal the frequency adjuster adjusts the signal having the first frequency to generate a signal having a second frequency, the second frequency being lower than the first frequency, and outputs the signal having the second frequency to the secure RTC. A clock line transmits the signal having the first frequency and the signal having the second frequency from the frequency adjuster to the secure RTC, and has a first power consumption when transmitting the signal having the first frequency and a second power consumption when transmitting the signal having the second frequency, the first power consumption being greater than the second power consumption.

Claims (27)

1. A secure real time clock (RTC) system comprising:

a secure RTC;

a frequency adjuster connected between the secure RTC and the frequency signal generator, for receiving a signal having a first frequency from the frequency signal generator, and on receipt of a first control signal outputting the signal having the first frequency to the secure RTC, and on receipt of a second control signal adjusting the signal having the first frequency to generate a signal having a second frequency, the second frequency being lower than the first frequency, the first and second control signals indicative of a power mode of the system,

wherein the frequency adjuster comprising:

a frequency divider and

a multiplexer for respectively receiving the first and second control signals, and respectively causing output of either the signal having the first frequency in response to receiving the first control signal or the signal having the second frequency in response to receiving the second control signal.

2. The system as claimed in claim 1 wherein the frequency divider is arranged for adjusting the signal having the first frequency to generate the signal having the second frequency by frequency dividing the signal having the first frequency.

3. The system as claimed in claim 2 wherein the frequency divider frequency is arranged to divide the signal having the first frequency by 2n.

4. The system as claimed in claim 1 , wherein the multiplexer receives the first control signal in response to the system operating in a normal power mode.

5. The system as claimed in claim 4 wherein the multiplexer receives the second control signal in response to the system operating in a low power mode.

6. The system as claimed in claim 1 further comprising a clock line for transmitting the signal having the first frequency and the signal having the second frequency from the frequency adjuster to the secure RTC, the clock line having a first power consumption when transmitting the signal having the first frequency and having a second power consumption when transmitting the signal having the second frequency, the first power consumption being greater than the second power consumption.

7. The system as claimed in claim 1 wherein when the frequency adjuster outputs the signal having the first frequency to the secure RTC, the RTC operates with a first accuracy, and when the frequency adjuster outputs the signal having the second frequency to the secure RTC, the RTC operates with a second accuracy, the first and second accuracies being substantially the same.

8. The system as claimed in claim 1 wherein the frequency generator is implemented on a power management integrated circuit of the system.

9. The system as claimed in claim 1 wherein the frequency adjustor is implemented on a power management integrated circuit of the system.

10. The system as claimed in claim 1 wherein the secure RTC is implemented on a microprocessor of the system.

11. The system as claimed in claim 2 wherein the multiplexer receives the first control signal when the system is operating in a normal power mode.

12. The system as claimed in claim 3 wherein the multiplexer receives the first control signal when the system is operating in a normal power mode.

13. The system as claimed in claim 2 wherein the multiplexer receives the second control signal when the system is operating in a low power mode.

14. The system as claimed in claim 3 wherein the multiplexer receives the second control signal when the system is operating in a low power mode.

15. The system as claimed in claim 4 wherein the multiplexer receives the second control signal when the system is operating in a low power mode.

16. The system as claimed in claim 2 further comprising a clock line for transmitting the signal having the first frequency and the signal having the second frequency from the frequency adjustor to the secure RTC, the clock line having a first power consumption when transmitting the signal having the second frequency, the first power consumption being greater than the second power consumption.

17. The system as claimed in claim 3 further comprising a clock line for transmitting the signal having the first frequency and the signal having the second frequency from the frequency adjuster to the secure RTC, the clock line having a first power consumption when transmitting the signal having the first frequency, and having a second power consumption when transmitting the signal having the second frequency, the first power consumption being greater than the second power consumption.

18. The system as claimed in claim 4 further comprising a clock line for transmitting the signal having the first frequency and the signal having the second frequency from the frequency adjuster to the secure RTC, the clock line having a first power consumption when transmitting the signal having the first frequency and having a second power consumption when transmitting the signal having the second frequency, the first power consumption being greater than the second power consumption.

19. The system as claimed in claim 5 further comprising a clock line for transmitting the signal having the first frequency and the signal having the second frequency from the frequency adjuster to the secure RTC, the clock line having a first power consumption when transmitting the signal having the first frequency and having a second power consumption when transmitting the signal having the second frequency, the first power consumption being greater than the second power consumption.

20. A method of operating a secure real time clock(RTC) system, the method comprising:

supplying a secure RTC of the system with a signal having a first frequency in response to the system operating in a first power mode;

supplying the secure RTC with a signal having a second frequency instead of supplying the signal having the first frequency in response to the system operating in a second, lower, power mode, the second frequency being lower than the first frequency.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037355/0723 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024079/0082 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2009
From: VOORWINDEN, COR; PRIEL, MICHAEL
To: FREESCALE SEMICONDUCTOR INC
Reel/Frame 023483/0010 →