Method to control uniformity/composition of metal electrodes, silicides on topography and devices using this method
View Patent ↗A method for depositing metals on surfaces is provided which comprises (a) providing a substrate ( 103 ) having a horizontal surface ( 107 ) and a vertical surface ( 105 ); (b) depositing a first metal layer ( 109 ) over the horizontal and vertical surfaces; (c) depositing a layer of polysilicon ( 111 ) over the horizontal and vertical surfaces; (d) treating the layer of polysilicon with a plasma such that a residue ( 113 ) remaining from the treatment is preferentially formed over the horizontal surfaces rather than the vertical surfaces, and wherein the residue is resistant to a first metal etch; and (e) exposing the substrate to the first metal etch.
1. A method for making a semiconductor device, comprising:
providing a substrate having a horizontal surface and a vertical surface;
depositing a first metal layer over the horizontal and vertical surfaces;
depositing a layer of polysilicon over the first metal layer;
treating the layer of polysilicon with a plasma such that a residue remaining from the treatment is preferentially formed over the horizontal surfaces rather than the vertical surfaces, and wherein the residue is resistant to a first metal etch; and
subjecting the exposed portions of the first metal layer to a first metal etch.
2. The method of claim 1 , wherein the first metal etch removes the first metal layer from the vertical surface at a rate R v , wherein the first metal etch removes the first metal layer from the horizontal surface at a rate R h , and wherein R v >R h .
3. The method of claim 1 , wherein the vertical and horizontal surfaces form portions of the source or drain regions of a MOSFET.
4. The method of claim 1 , further comprising;
forming a second metal layer on the vertical and horizontal surfaces.
5. The method of claim 4 , wherein the second metal layer is removed from the horizontal surface and remains on the vertical surface.
6. The method of claim 4 , wherein the first and second metal layers are formed from first and second distinct metals.
7. The method of claim 4 , wherein the first and second metal layers have substantially different thicknesses.
8. The method of claim 4 , wherein the semiconductor device is a FinFET, and wherein the horizontal and vertical surfaces are disposed on a fin within said FinFET.
9. The method of claim 8 , further comprising:
subjecting the first and second metal layers to salicidation.
10. The method of claim 9 , wherein the second metal layer has an average thickness which is substantially less than the average thickness of the first metal layer.
11. The method of claim 1 , wherein the substrate comprises a first region selected from the group consisting of source and drain regions, and wherein said first region comprises the horizontal and vertical surfaces.
12. The method of claim 1 , wherein the semiconductor device is a PMOS device, wherein the source region of the PMOS contains a portion of the vertical surface, and wherein the drain region of the PMOS also contains a portion of the vertical surface.
13. The method of claim 1 , further comprising:
partially etching the portion of the first metal layer which extends over the vertical surface; and
removing the reside from the portion of the first metal layer which extends over the horizontal surface.
14. The method of claim 13 , wherein the semiconductor device is a FinFET, and wherein the horizontal and vertical surfaces are disposed on a fin within said FinFET.
15. The method of claim 1 , wherein the first metal etch removes the portion of the first metal layer from the vertical surface, and further comprising:
subjecting the vertical surface to ion implantation.
16. The method of claim 15 , wherein the first metal layer effectively masks the horizontal surface from ion implantation.
17. A method for making a CMOS device, comprising:
providing a semiconductor structure having NMOS and PMOS regions defined therein, wherein each of the NMOS and PMOS regions has at least one vertical and horizontal surface associated therewith;
depositing a first metal layer comprising a first metal over the horizontal and vertical surfaces of the PMOS region;
forming an etch residue on the horizontal surface of the PMOS region; and
selectively removing the first metal from the vertical surface in the PMOS region such that the first metal remains on the horizontal surface in the PMOS region.
18. The method of claim 17 , further comprising:
depositing a second metal layer comprising a second metal on the vertical surface in the NMOS region.
19. The method of claim 17 , wherein the first and second metals are distinct.
20. The method of claim 19 , wherein the average thicknesses of the first and second metal layers are substantially different.