IP Library Granted Patent US 7,632,715
Granted Patent B2
US 7,632,715 · App. 11/620,074 · Granted Dec 15, 2009

Method of packaging semiconductor devices

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Quick Facts
Patent No.
US 7,632,715
App. No.
11/620,074
Granted
Dec 15, 2009
Kind
B2
Abstract

A method of packaging a semiconductor includes providing a support structure. An adhesive layer is formed overlying the support structure and is in contact with the support structure. A plurality of semiconductor die is placed on the adhesive layer. The semiconductor die are laterally separated from each other and have electrical contacts that are in contact with the adhesive layer. A layer of encapsulating material is formed overlying and between the plurality of semiconductor die and has a distribution of filler material. A concentration of the filler material is increased in all areas laterally adjacent each of the plurality of semiconductor die.

Claims (51)

1. A method comprising:

providing a support structure ( 12 );

forming an adhesive layer ( 14 ) overlying the support structure, the adhesive layer having a first adhesive surface in contact with the support structure and an opposite second adhesive surface;

placing a plurality of semiconductor die ( 16 - 20 ) on the second adhesive surface of the adhesive layer, the plurality of semiconductor die being laterally separated from each other and having electrical contacts ( 22 , 24 ) that are in contact with the second adhesive surface of the adhesive layer;

forming a layer of encapsulating material ( 26 ) overlying and between the plurality of semiconductor die, the layer of encapsulating material having a distribution of filler material ( 28 ), a top portion, and a bottom portion;

increasing a concentration of the filler material ( 28 ) in all areas laterally adjacent each of the plurality of semiconductor die so that the bottom portion has a higher concentration of filler material than the top portion; and

removing the top portion.

2. The method of claim 1 further comprising:

also increasing concentration of the filler material in portions of the layer of encapsulating material overlying the plurality of semiconductor die that are in close proximity to the plurality of semiconductor die.

3. The method of claim 1 further comprising:

increasing the concentration of the filler material by applying vibrational energy to the support structure, adhesive layer, plurality of semiconductor die and layer of encapsulating material.

4. The method of claim 3 further comprising:

increasing the concentration of the filler material by applying ultrasonic energy as the vibrational energy.

5. The method of claim 1 further comprising:

increasing the concentration of filler material by aligning the support structure to be below the adhesive layer, plurality of semiconductor die and layer of encapsulating material to permit gravity to modify the filler material concentration.

6. The method of claim 1 further comprising:

increasing the concentration of filler material by placing the support structure, adhesive layer, plurality of semiconductor die and layer of encapsulating material in a vacuum to modify the filler material concentration.

7. The method of claim 1 further comprising:

increasing the concentration of filler material by applying centrifugal energy to the support structure, adhesive layer, plurality of semiconductor die and layer of encapsulating material.

8. The method of claim 1 further comprising:

increasing the concentration of filler material by using a magnetic or charged filler material influenced by a magnetic or electric field.

9. The method of claim 1 wherein the layer of encapsulating material comprises a glob-type resin, the method further comprising:

curing the encapsulating material with a thermal anneal of the layer of encapsulating material, plurality of semiconductor die, adhesive layer and support structure;

wherein the step of removing the top portion comprises planarizing.

10. The method of claim 1 further comprising:

removing the support structure and the adhesive layer;

inverting the layer of encapsulating material and plurality of semiconductor die so that a portion of the layer of encapsulating material is below the plurality of semiconductor die;

exposing electrical contacts to the plurality of semiconductor die; and

completing formation of packaged semiconductor devices with additional structures formed overlying the plurality of semiconductor die.

11. A method comprising:

providing a base;

placing an adhesive tape overlying the base, the adhesive tape having a first adhesive surface in contact with the base and an opposite second adhesive surface;

placing a plurality of semiconductor die on the second adhesive surface of the adhesive tape, the plurality of semiconductor die being laterally separated from each other and having electrical contacts that are in contact with the second adhesive surface of the adhesive layer;

forming an encapsulant overlying and between the plurality of semiconductor die, the encapsulant having a distribution of filler material, a top portion, and a bottom portion;

creating a high concentration region in all areas of the filler material that are laterally adjacent each of the plurality of semiconductor die so that the bottom portion has a higher concentration of filler material than the top portion, the high concentration region having at least eighty-five percent by weight of filler material; and

removing the top portion.

12. The method of claim 11 further comprising:

increasing a size of the high concentration region of the filler material to include a portion overlying the plurality of semiconductor die.

13. The method of claim 11 further comprising:

increasing concentration of the filler material by applying vibrational energy to the workpiece, adhesive tape, plurality of semiconductor die and encapsulant.

14. The method of claim 11 further comprising:

increasing concentration of the filler material by aligning the workpiece to be below the adhesive tape, plurality of semiconductor die and encapsulant to permit gravity to modify the concentration of the filler material.

15. The method of claim 11 further comprising:

increasing concentration of the filler material by placing the workpiece, adhesive tape, plurality of semiconductor die and encapsulant in a vacuum to modify the concentration of the filler material.

16. The method of claim 11 further comprising:

increasing concentration of the filler material by applying centrifugal energy to the workpiece, adhesive tape, plurality of semiconductor die and encapsulant.

17. The method of claim 11 further comprising:

increasing concentration of the filler material by using a magnetic or charged filler material influenced by a magnetic or electric field.

18. The method of claim 11 wherein the encapsulant comprises a glob-type resin, the method further comprising:

curing the encapsulant, plurality of semiconductor die, adhesive tape and workpiece with a thermal anneal;

wherein the step of removing the first portion comprises planarizing.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
323.01(C) ASSIGNMENT OR CHANGE OF NAME IMPROPERLY FILED AND RECORDED BY ANOTHER PERSON AGAINST OWNER'S PATENT Recorded Oct 3, 2019
From: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052459/0656 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2017
From: NORTH STAR INNOVATIONS INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 041717/0736 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0640 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037355/0723 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →