Package for high power integrated circuits and method for forming
A method for packaging an integrated circuit comprises the steps of: providing a ground plane, the ground plane having a recessed area shaped to receive an integrated circuit die, wherein the integrated circuit die having a first surface with active circuitry, a second surface, and an edge generally orthogonal to the first and second surfaces; attaching the second surface of the integrated circuit die to a bottom of the recessed area with a thermally conductive adhesive; filling a space between the edge of the integrated circuit die and a side of the recessed area with a fill material; forming an insulating layer on the ground plane and the first surface of the integrated circuit die; patterning the insulating layer to expose contacts on the first surface of the integrated circuit die; and plating electrical conductors on the insulating layer and the contacts.
1. A method for packaging an integrated circuit, the method comprising:
providing a ground plane, the ground plane having a first side, the first side having a recessed area shaped to receive an integrated circuit die, and a second side opposite the first side, wherein the integrated circuit die having a first surface with active circuitry, a second surface, and an edge generally orthogonal to the first and second surfaces;
attaching the second surface of the integrated circuit die to the recessed area;
filling a space between the edge of the integrated circuit die and the first side of the ground plane with a fill material;
forming an encapsulant layer at least partially over the second side of the ground plane;
forming a first insulating layer on the first side of the ground plane and the first surface of the integrated circuit die;
patterning the first insulating layer to expose contacts on the first surface of the integrated circuit die; and
plating electrical conductors on the first insulating layer and the contacts.
2. The method of claim 1 , further comprising using a stamping process to form the recessed area in the ground plane.
3. The method of claim 1 , wherein the recessed area further comprises a cap portion connected to the ground plane with a plurality of tabs.
4. The method of claim 1 , further comprising forming a second insulating layer over the first insulating layer and over the electrical conductors.
5. The method of claim 1 , wherein the encapsulant layer covers all of the second side of the ground plane.
6. The method of claim 1 , further comprising using a stamping process to form fins and the recessed area on the ground plane.
7. The method of claim 1 , wherein the ground plane is corrugated.
8. The method of claim 1 , wherein the ground plane comprises a metal.
9. The method of claim 1 , further comprising forming solder balls electrically coupled to the electrical conductors.
10. A method for packaging an integrated circuit, the method comprising:
providing a substrate having a surface;
attaching an integrated circuit die to the substrate, the integrated circuit die having a first surface with active circuitry, a second surface, and an edge generally orthogonal to the first and second surfaces;
coupling a ground plane to the substrate and to the second surface of the integrated circuit die, the ground plane having a recessed area shaped to receive the integrated circuit die;
filling a space between the edge of the integrated circuit die and a side of the recessed area with a fill material;
removing the substrate from the integrated circuit die and from the ground plane;
forming an insulating layer on the ground plane and the first surface of the integrated circuit die;
patterning the insulating layer to expose contacts on the first surface of the integrated circuit die; and
plating electrical conductors on the insulating layer and the contacts.
11. The method of claim 10 , wherein coupling the ground plane to the substrate and to the second surface of the integrated circuit die further comprises attaching the second surface of the integrated circuit die to a bottom of the recessed area with a thermally conductive adhesive.
12. The method of claim 10 , further comprising using a stamping process to form the recessed area in the ground plane.
13. The method of claim 10 , wherein the recessed area further comprises a cap portion connected to the ground plane with a plurality of tabs.
14. The method of claim 10 , further comprising forming fins on the ground plane.
15. The method of claim 10 , wherein the ground plane is corrugated.
16. A method for packaging an integrated circuit, the method comprising:
providing a substrate having a planar surface;
contacting an integrated circuit die to the planar surface, the integrated circuit die having a first surface with active circuitry, a second surface, and an edge generally orthogonal to the first and second surfaces;
providing a ground plane, the ground plane having a first side and a second side opposite the first side, the ground plane further comprising a recessed area open on the first side, wherein the recessed area is shaped to receive the integrated circuit die;
contacting a portion of the first side of the ground plane to the planar surface;
coupling the recessed area of the ground plane to the second surface of the integrated circuit die;
removing the integrated circuit die and the ground plane from the substrate;
filling a space between the edge of the integrated circuit die and a side of the recessed area with a fill material; and
forming a patterned interconnect layer over the ground plane and the first surface of the integrated circuit die, the patterned interconnect layer coupled to the first surface of the integrated circuit die.
17. The method of claim 16 , wherein providing the ground plane further comprises providing a ground plane comprising a metal.
18. The method of claim 16 , further comprising forming solder balls electrically coupled to the patterned interconnect layer.
19. The method of claim 16 , further comprising forming an encapsulant layer at least partially over the second side of the ground plane.
20. The method of claim 16 , further comprising forming an encapsulant layer over the second side of the ground plane.