IP Library Granted Patent US 8,942,655
Granted Patent B2
US 8,942,655 · App. 12/600,687 · Granted Jan 27, 2015

Integrated circuit, wireless communication unit and method for determining quadrature imbalance

Inventors: Norman Beamish (Cork, IE); Conor O'Keeffe (Cork, IE); Patrick Pratt (Mallow, IE)
Assignee: Freescale Semiconductor, Inc.
H03D3/009H04B1/30H04L27/0014
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Quick Facts
Patent No.
US 8,942,655
App. No.
12/600,687
Granted
Jan 27, 2015
Kind
B2
Abstract

An integrated circuit comprising processing logic for operably coupling to radio frequency (RF) receiver circuitry arranged to receive a wireless network signal. The receiver circuitry generates in-phase and quadrature digital baseband representations of the wireless network signal. The processing logic determines quadrature (I/Q) imbalance of the RF receiver circuitry based on the in-phase and quadrature digital baseband representations of the wireless network signal.

Claims (38)

1. An integrated circuit comprising: radio frequency (RF) receiver circuitry arranged to receive a wireless network signal, wherein the receiver circuitry generates in-phase and quadrature digital baseband representations of the wireless network signal; and

processing logic operably coupled to the radio frequency (RF) receiver circuitry and arranged to:

determine quadrature (I/Q) imbalance of the RF receiver circuitry based on the in-phase and quadrature digital baseband representations of the wireless network signal, wherein the processing logic is arranged to set the RF receiver circuitry to operate in a direct conversion radio (DCR) mode for the purpose of determining quadrature imbalance and determine quadrature imbalance only in the DCR mode; and

to set the RF receiver circuitry to operate in an intermediate frequency (I/F) mode when I/Q imbalance has been determined.

2. The integrated circuit of claim 1 , wherein the processing logic is arranged to calibrate the RF receiver circuitry to compensate for quadrature imbalance of the RF receiver circuitry.

3. The integrated circuit of claim 1 , wherein the processing logic is arranged to determine quadrature imbalance based on measurements of in-phase and quadrature digital baseband representations of a network signal received as part of a power scan operation.

4. The integrated circuit of claim 3 , wherein: the processing logic is further arranged to synchronise signal timing of a wireless communication unit containing the integrated circuit with a remote base station; and

the processing logic is arranged to determine quadrature imbalance prior to synchronisation with the remote base station.

5. The integrated circuit, of claim 1 , wherein the processing logic is arranged to determine quadrature imbalance based on measurements of in-phase and quadrature digital baseband representations of a network signal received as part of a frequency control channel (FCCh) scan.

6. The integrated circuit of claim 5 , wherein the processing logic is arranged to determine quadrature imbalance based on measurements of in-phase and quadrature digital baseband representations of a frequency correction burst (FCB) within the FCCh.

7. The integrated circuit of claim 1 , further comprising an RFIC control signal, whereby the processing logic is to signal the RF receiver circuitry via the RFIC control signal to operate in the DCR mode.

8. A method for determining quadrature (I/Q) imbalance within radio frequency (RF) receiver circuitry of a wireless communication unit, the method comprising the steps of:

receiving a wireless network signal;

setting a first signal generated by a local oscillator of the RF receiver circuitry to a first frequency for the purpose of measuring quadrature imbalance;

generating in-phase and quadrature digital baseband representations of the wireless network signal;

determining quadrature (I/Q) imbalance of the RF receiver circuitry based on the in-phase and quadrature digital baseband representations of the wireless network signal; and

setting a second signal generated by the local oscillator of the RF receiver circuitry to a second frequency for the purpose of normal operations, wherein the first frequency is not used for the purpose of normal operations.

9. The method of claim 8 further comprising calibrating the RF receiver circuitry to compensate for quadrature imbalance of the RF receiver circuitry in response to said determination.

10. The method of claim 8 further comprising setting the local oscillator of the RF receiver circuitry to generate the frequency of the first signal wherein the first signal, when mixed with the received wireless network signal, shifts a frequency of the received wireless network signal to a baseband frequency, thereby causing the RF receiver circuitry to operate in a direct conversion radio (DCR) mode prior to determining quadrature imbalance.

11. The method of claim 8 further comprising determining quadrature imbalance based on measurements of in-phase and quadrature digital baseband representations of a network signal received as part of a power scan operation.

12. The method of claim 8 further comprising determining quadrature imbalance based on measurements of in-phase and quadrature digital baseband representations of a network signal received as part of a frequency control channel (FCCh) scan.

13. The method of claim 12 further comprising determining quadrature imbalance based on measurements of in-phase and quadrature digital baseband representations of a frequency correction burst within the FCCh.

14. The method of claim 8 , wherein:

the RF receiver circuitry is operating in a very low intermediate frequency (VLIF) mode during normal operations;

the VLIF is a positive frequency; and

the setting the first signal comprises setting the frequency of the first signal generated by the local oscillator of the RF receiver circuitry, whereby a tone energy of an output of the RF receiver circuitry to an analogue to digital converter (ADC) on the received wireless network signal lies between the VLIF frequency and a frequency of zero.

15. The method of claim 8 , wherein:

the RF receiver circuitry is operating in a very low intermediate frequency (VLIF) mode during normal operations;

the VLIF is a positive frequency; and

the setting the first signal comprises adding an offset to one or more mixers of the RF receiver circuitry, whereby a tone energy of an output of the RF receiver circuitry to an ADC on the received wireless network signal lies between the VLIF frequency and a frequency of zero.

16. The method of claim 15 , wherein:

the received wireless network signal comprises an FCCh tone; and

the setting comprises setting the frequency of the signal generated by the local oscillator of the RF receiver circuitry whereby an FCCh tone energy of the output of the RF receiver circuitry to the ADC on the received FCCh tone lies between the VLIF frequency and a frequency of zero.

17. A wireless communication unit comprising an integrated circuit according to claim 1 , wherein:

in the DCR mode, the processing logic is arranged to determine the I/Q imbalance based on the in-phase and quadrature digital baseband representations of the received wireless network signal; and

in the I/F mode, the RF receiver circuitry is to transform received other wireless network signals to signals at an intermediate frequency, to transform the signals at the intermediate frequency to baseband, and to transform the baseband to audio for a user of the wireless communication unit.

18. The wireless communication unit of claim 17 , wherein the wireless communication device is one of a private mobile radio, a cellular phone, a personal digital assistant, a wireless capable laptop computer.

19. The wireless communication unit of claim 18 , wherein the cellular phone supports at least one of the following communication formats: Global System for Mobile communications (GSM), general packet radio system (GPRS), enhanced general packet radio system (EGPRS), and enhanced GSM (EGSM).

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037355/0723 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
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SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2009
From: BEAMISH, NORMAN; O'KEEFFE, CONOR; PRATT, PATRICK
To: FREESCALE SEMICONDUCTOR INC
Reel/Frame 023536/0772 →
Continuity (1)
Related Publication 20100167674A1 · Jul 1, 2010