Unified memory architecture and display controller to prevent data feed under-run
View Patent ↗A display controller for controlling data in an isochronous display where fluctuation of data feed latency occurs, the display controller including an input memory which receives pixel data and transmits the pixel data through a main route and a secondary route; wherein pixel data is transmitted through the main route and is processed for delivery to the display in a predetermined manner; characterized in that the secondary route comprises a memory for storing a two-dimensional section of the pixel data that corresponds at least in part to the pixel data being transmitted through the main route at that time; further characterized in that the display controller includes a detector for identifying a data feed latency event and in response there to switching the transmission of the pixel data to the secondary route and processing the pixel data through secondary route for delivery to the display such that when a data feed latency event occurs the stored two-dimensional section of the pixel data from the secondary route is displayed on the display.
1. A display controller for controlling data in an isochronous display where fluctuation of data feed latency occurs, the display controller comprising:
an input memory which receives at an input of the input memory pixel data and transmits at an output of the input memory the pixel data through a main route and a secondary route; wherein, when in operation pixel data is transmitted through the main route and is processed for delivery to the display in a predetermined manner;
the secondary route comprises a secondary memory for storing a two-dimensional section of the pixel data that corresponds at least in part to the pixel data being transmitted through the main route at that time;
the display controller further comprises a detector for identifying a data feed latency event, and, in response thereto switching the transmission of the pixel data to the secondary route and processing the pixel data through the secondary route for delivery to the display such that when a data feed latency event occurs, causing missing pixel data in the main route, the stored two-dimensional section of the pixel data from the secondary route is displayed on the display to provide a two dimensional extrapolation to take the place of the missing pixel data;
wherein the secondary route comprises an encoder for encoding on a line by line basis the pixel data and a decoder which can decode the stored encoded pixel data when required, and wherein the secondary memory stores encoded data: and
wherein the decoder comprises an expander and an extrapolator, the extrapolator to receive at a first input of the extrapolator pixel data output from the expander and to receive at a second input of the extrapolator pixel data output from the input memory, wherein the extrapolation is based on the pixel data received at the first input of the extrapolator and the second input of the extrapolator.
2. A display controller as claimed in claim 1 , wherein the secondary memory stores at least one line of pixel data that corresponds to the pixel data being transmitted through the main route at that time.
3. A display controller as claimed in claim 2 , wherein the secondary memory is provided by an already existing memory within the display controller.
4. A display controller as claimed in claim 1 , wherein the encoder comprises a compressor.
5. A display controller as claimed in claim 1 , wherein the secondary memory comprises a FIFO.
6. A display controller as claimed in claim 1 , wherein the secondary memory is provided by an already existing memory within the display controller.
7. A display controller as claimed in claim 6 , wherein the secondary memory is provided by a palette RAM.
8. A display controller as claimed in claim 7 , wherein the palette RAM data to be selectively routed from an output of the palette RAM through a portion of the main route and processed for delivery to the display.
9. A display controller as claimed in claim 1 , wherein the extrapolated pixel data to be selectively routed from an output of the extrapolator through the main route and processed for delivery to the display.
10. A method for controlling data in an isochronous display where fluctuation of data feed latency occurs, the method comprising:
receiving pixel data from an input memory;
transmitting the received pixel data through a main route and a secondary route,
processing pixel data transmitted through the main route for delivery to the display in a predetermined manner;
storing in a memory in the second route a two-dimensional section of the pixel data that corresponds at least in part to the pixel data being transmitted through the main route at that time;
identifying a data feed latency event;
switching the transmission of the pixel data to the secondary route; and
processing the pixel data through the secondary route for delivery to the display such that when a data feed latency event occurs, causing missing pixel data in the main route, the stored two-dimensional section of the pixel data from the secondary route is displayed on the display to provide a two-dimensional extrapolation to take the place of the missing pixel data;
wherein the secondary route comprises an encoder for encoding on a line by line basis the pixel data and a decoder which can decode encoded pixel data when required, and wherein a secondary memory stores encoded data; and
wherein the decoder comprises an expander and an extrapolator, the extrapolator to receive at a first input of the extrapolator pixel data output from the expander and to receive at a second input of the extrapolator pixel data output from the input memory, wherein the extrapolation is based on the pixel data received at the first input of the extrapolator and the second input of the extrapolator.
11. The method of claim 10 , wherein the step of storing comprises storing a line of pixel data corresponding to the pixel data being transmitted through the main route at that time.
12. A non-transitory computer readable medium having a computer program stored thereon, the computer program comprising instructions that when said computer program is executed on a computer system carries out a method for controlling data in an isochronous display where fluctuation of data feed latency occurs, the method comprising:
receiving pixel data from an input memory;
transmitting the received pixel data through a main route and a secondary route;
processing pixel data transmitted through the main route for delivery to the display in a predetermined manner;
storing in a memory in the second route a two-dimensional section of the pixel data that corresponds at least in part to the pixel data being transmitted through the main route at that time;—identifying a data feed latency event;
switching the transmission of the pixel data to the secondary route; and
processing the pixel data through the secondary route for delivery to the display such that when a data feed latency event occurs, causing missing pixel data in the main route, the stored two-dimensional section of the pixel data from the secondary route is displayed on the display to provide a two-dimensional extrapolation to take the place of the missing pixel data;
wherein the secondary route comprises an encoder for encoding on a line by line basis the pixel data and a decoder which can decode encoded pixel data when required, and wherein a secondary memory stores encoded data: and
wherein the decoder comprises an expander and an extrapolator, the extrapolator to receive at a first input of the extrapolator pixel data output from the expander and to receive at a second input of the extrapolator pixel data output from the input memory, wherein the extrapolation is based on the pixel data received at the first input of the extrapolator and the second input of the extrapolator.
13. The non-transitory computer readable medium of claim 12 , wherein the secondary memory is provided by an already existing memory within the display controller.