IP Library Granted Patent US 7,635,998
Granted Patent B1
US 7,635,998 · App. 12/170,451 · Granted Dec 22, 2009

Pre-driver for bridge circuit

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Quick Facts
Patent No.
US 7,635,998
App. No.
12/170,451
Granted
Dec 22, 2009
Kind
B1
Abstract

A pre-driver for driving a high-side transistor of a bridge driver is connected to a bridge driver including first and second drive transistors connected in series between a high voltage power supply and ground. A reference circuit generates a reference voltage that varies depending on the output voltage of the bridge driver. In response to the reference voltage, the regulator circuit generates an internal power supply voltage that is substantially higher than the output voltage by a constant value. A buffer circuit generates a drive voltage for driving the first drive transistor based on the internal power supply voltage and the output voltage.

Claims (32)

1. A pre-driver for connection to a bridge driver that generates a bridge driver output voltage at an output node between a first drive transistor connected to a first high-voltage power supply and a second drive transistor connected between the first drive transistor and ground, the pre-driver comprising:

a reference circuit, connected between the output node and a second high-voltage power supply, for generating a reference voltage that varies depending on the bridge driver output voltage;

a regulator circuit, connected to the reference circuit and receiving the reference voltage therefrom, for generating, in response to the reference voltage, an internal power supply voltage that is substantially higher than the bridge driver output voltage by a constant voltage; and

a buffer circuit, connected between the regulator circuit and the output node, and to the first drive transistor, for generating a drive voltage that drives the first drive transistor based on the internal power supply voltage and the bridge driver output voltage.

2. The pre-driver of claim 1 , wherein the reference voltage generated by the reference circuit is higher than the output voltage by a predetermined voltage.

3. The pre-driver of claim 1 , wherein the first drive transistor is a MOS transistor having a drain connected to the first high-voltage power supply, a source connected to the output node, and a gate receiving the drive voltage, and the constant voltage is set to a source-gate withstand voltage of the MOS transistor.

4. The pre-driver of claim 1 , further comprising:

a current adjustment circuit, connected to the reference circuit and the regulator circuit, for adjusting current that flows to the regulator circuit.

5. The pre-driver of claim 4 , wherein the current adjustment circuit includes a resistor.

6. The pre-driver of claim 1 , further comprising:

a level shifter, connected to the buffer circuit, for converting an input signal, which has a first amplitude level, to an output signal, which has a second amplitude level and oscillates between the internal power supply voltage and the output voltage.

7. The pre-driver of claim 1 , wherein the reference circuit includes at least one Zener diode.

8. The pre-driver of claim 7 , wherein the at least one Zener diode includes a plurality of series-connected Zener diodes.

9. The pre-driver of claim 1 , wherein the regulator circuit includes a push-pull circuit, connected between the output node and a second high-voltage power supply that supplies higher voltage than the first high-voltage power supply, for generating the internal power supply voltage in response to the reference voltage.

10. The pre-driver of claim 9 , wherein:

the reference circuit is connected between the second high-voltage power supply and the output node and generates the reference voltage at a gate node between the second high-voltage power supply and the reference circuit;

the push-pull circuit includes:

an NMOS transistor having a drain connected to the second high-voltage power supply, a gate connected to the gate node, and a source; and

a PMOS transistor having a source connected to the source of the NMOS transistor, a drain connected to the output node, and a gate connected to the gate node; and

the push-pull circuit generates the internal power supply voltage at the sources of the NMOS transistor and the PMOS transistor.

11. The pre-driver of claim 10 , wherein the reference circuit includes at least one Zener diode connected between the gate node and the output node.

12. The pre-driver of claim 11 , wherein the at least one Zener diode includes a plurality of series-connected Zener diodes.

13. The pre-driver of claim 10 , further comprising:

a current adjustment circuit, connected between the second high-voltage power supply and the gate node, for adjusting current that flows to the gate node.

14. The pre-driver of claim 1 , further comprising:

a capacitor including a first terminal to which the internal power supply voltage is applied and a second terminal to which the output voltage of the bridge driver is applied.

15. The pre-driver of claim 1 , wherein the bridge driver is one of a half-bridge circuit and a full-bridge circuit.

16. A pre-driver for connection to a bridge driver that generates a bridge driver output voltage at an output node between a first drive transistor connected to a first high-voltage power supply and a second drive transistor connected between the first drive transistor and ground, the pre-driver comprising:

a reference circuit, connected between the output node and a second high-voltage power supply that supplies higher voltage than the first high-voltage power supply, for generating a reference voltage that varies depending on the output voltage of the bridge driver;

a push-pull circuit, connected between the output node and the second high-voltage power supply and including an output terminal and an input terminal that receives the reference voltage, for generating an internal power supply voltage that is substantially higher than the output voltage by a constant voltage in response to the reference voltage;

a current adjustment circuit, connected between the second high-voltage power supply and the input terminal of the push-pull circuit, for adjusting current that flows to the input terminal of the push-pull circuit; and

a buffer circuit, connected between the push-pull circuit and the output node, and to the first drive transistor, for generating a drive voltage that drives the first drive transistor based on the internal power supply voltage and the output voltage.

Assignments (25)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037355/0723 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0757 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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