IP Library Granted Patent US 8,242,815
Granted Patent B2
US 8,242,815 · App. 12/596,253 · Granted Aug 14, 2012

Microcontroller unit and method therefor

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Quick Facts
Patent No.
US 8,242,815
App. No.
12/596,253
Granted
Aug 14, 2012
Kind
B2
Abstract

A microcontroller unit comprises a reset controller operably coupled to a plurality of logic elements of the microcontroller unit. Low voltage detection logic is operably coupled to the reset controller and arranged to provide a plurality of low voltage interrupt signals to a number of respective logic elements of the microcontroller unit via the reset controller. A method of operating a microcontroller unit is also described.

Claims (38)

1. A microcontroller unit comprising:

a reset controller operably coupled to a plurality of logic elements of the microcontroller unit,

a low voltage detection logic is operably coupled to the reset controller and arranged to provide a plurality of low voltage interrupt signals to a number of respective logic elements of the microcontroller unit via the reset controller, wherein the low voltage detection logic is operably coupled to at least one register employing register locking, wherein upon applying a low voltage interrupt signal of the plurality of low voltage interrupt signals to the register the register may only be accessed once prior to reset, and wherein the plurality of low voltage interrupt signals comprises:

a warning that a voltage supply to the microcontroller unit is to traverse out of specification;

a notification that a voltage supply to the microcontroller unit has traversed out of specification; and

a reset initiating signal.

2. The microcontroller unit of claim 1 wherein the low voltage detection logic is arranged to provide each of the plurality of low voltage interrupt signals independent of each other to a plurality of the number of respective logic elements of the microcontroller unit via the reset controller.

3. The microcontroller unit of claim 1 wherein the low voltage detection logic is arranged to programmably provide the plurality of low voltage interrupt signals to a plurality of the number of respective logic elements of the microcontroller unit via the reset controller.

4. The microcontroller unit of claim 1 wherein the low voltage detection logic provides at least one of the plurality of low voltage interrupt signals to general purpose input-output ports of the microcontroller unit via reset controller.

5. The microcontroller unit of claim 1 wherein the plurality of logic elements of the microcontroller unit comprise one or more of the following: a data memory element, an executable memory, a central processing unit, the reset controller, and an analogue-to-digital converter.

6. The microcontroller unit of claim 1 wherein the low voltage detection logic provides one of the plurality of low voltage interrupt signals to independently enable operation of one or more of the plurality of logic elements of the microcontroller unit based on a supply voltage level provided to the microcontroller unit via the reset controller.

7. The microcontroller unit of claim 1 wherein the microcontroller unit comprises a part of a system-on-chip integrated circuit.

8. An integrated circuit comprising the microcontroller unit of claim 1 .

9. The microcontroller unit of claim 1 wherein the notification is configured to notify a user that the microcontroller is operating outside of a specified limit, and wherein the reset initiating signal is configured to cause a hard reset of at least one of the plurality of logic elements of the microcontroller unit.

10. A method of operating a microcontroller unit comprising a reset controller operably coupled to a plurality of logic elements of the microcontroller unit, the method comprising:

providing a plurality of low voltage interrupt signals to a number of respective logic elements of the microcontroller unit via the reset controller; and

providing a low voltage interrupt signal of the plurality of low voltage interrupt signals to at least one register of the microcontroller unit employing register locking such that the register may subsequently only be accessed once prior to reset, wherein the plurality of low voltage interrupt signals comprises:

a warning that a voltage supply to the microcontroller unit is to traverse out of specification when the voltage supply is below a first threshold voltage and above a second threshold voltage;

a notification that a voltage supply to the microcontroller unit has traversed out of specification when the voltage supply is below the second threshold voltage and above a third threshold voltage; and

a reset initiating signal when the voltage supply is below the third threshold voltage.

11. The method of operating the microcontroller unit of claim 10 , comprising:

providing each of the plurality of low voltage interrupt signals independent of each other to a plurality of the number of respective logic elements of the microcontroller unit via the reset controller.

12. The method of operating the microcontroller unit of claim 10 comprising programmably providing the plurality of low voltage interrupt signals to a plurality of the number of respective logic elements of the microcontroller unit via the reset controller.

13. The method of operating the microcontroller unit of claim 10 comprising:

providing at least one of the plurality of low voltage interrupt signals to general purpose input-output ports of the microcontroller unit via the reset controller.

14. The method of operating the microcontroller unit of claim 10 comprising:

providing one of the plurality of low voltage interrupt signals to independently enable operation of one or more of the logic elements of the microcontroller unit based on a supply voltage level provided to the microcontroller unit via the reset controller.

15. The method of operating the microcontroller unit of claim 10 wherein the microcontroller unit comprises a part of a system-on-chip integrated circuit.

16. The method of operating the microcontroller unit of claim 11 comprising programmably providing the plurality of low voltage interrupt signals to a plurality of the number of respective logic elements of the microcontroller unit via the reset controller.

17. The method of operating the microcontroller unit of claim 12 comprising:

providing at least one of the plurality of low voltage interrupt signals to general purpose input-output ports of the microcontroller unit via the reset controller.

18. A microcontroller unit comprising:

a reset controller operably coupled to a plurality of logic elements of the microcontroller unit,

a low voltage detection logic is operably coupled to the reset controller, the low voltage detection logic arranged to provide a plurality of low voltage interrupt signals to a number of respective logic elements of the microcontroller unit via the reset controller, wherein the plurality of low voltage interrupt signals comprises at least two of:

a warning that a voltage supply to the microcontroller unit is to traverse out of specification;

a notification that a voltage supply to the microcontroller unit has traversed out of specification; and

a reset initiating signal; and

at least one register operably coupled to the low voltage detection logic, wherein the at least one register employs register locking to enable the at least one register to only be accessed once prior to reset upon receiving a low voltage interrupt signal of the plurality of low voltage interrupt signals at the at least one register.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
323.01(C) ASSIGNMENT OR CHANGE OF NAME IMPROPERLY FILED AND RECORDED BY ANOTHER PERSON AGAINST OWNER'S PATENT Recorded Oct 3, 2019
From: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052459/0656 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2017
From: NORTH STAR INNOVATIONS INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
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SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2009
From: SCOBIE, JAMES ANDREW COLLIER; BEATTIE, DEREK; CULSHAW, CARL; DEVINE, ALAN; FEDDELER, JIM
To: FREESCALE SEMICONDUCTOR INC.
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