Floating gate non-volatile memory and method thereof
View Patent ↗A method is provided which includes forming a first gate overlying a major surface of an electronic device substrate and forming a second gate overlying and spaced apart from the first gate. The method further includes forming a charge storage structure horizontally adjacent to, and continuous along, the first gate and the second gate, wherein a major surface of the charge storage structure is substantially vertical to the major surface of the substrate.
1. A method comprising:
forming a first control gate overlying a major surface of a substrate for an electronic device;
forming a second control gate overlying the first control gate and spaced apart from the first control gate; and
forming a charge storage structure adjacent to, and continuous along the first control gate, the second control gate, and a region between the first control gate and the second control gate, wherein a major surface of the charge storage structure is substantially perpendicular to the major surface of the substrate.
2. The method of claim 1 , wherein forming the charge storage structure comprises forming a first region of the charge storage structure associated with the first control gate to store charge associated with a first data bit, wherein the first region is substantially surrounded by a dielectric.
3. The method of claim 2 , wherein forming the charge storage structure comprises forming a second region of the charge storage structure associated with the second control gate to store charge associated with a second data bit, wherein the second region is substantially surrounded by a dielectric.
4. The method of claim 3 , wherein the charge storage structure comprises discontinuous storage elements.
5. The method of claim 1 , further comprising:
forming a multi-gated active structure adjacent to the charge storage structure, the multi-gated active structure comprising a first surface and a second surface, the first surface along a first plane substantially defining a first interfacial region between the first surface and the charge storage structure, and the second surface along a second plane, wherein the second surface opposes the first surface such that they are substantially parallel.
6. The method of claim 5 , further comprising:
forming a conductive layer over the multi-gated active structure.
7. The method of claim 5 further comprising:
injecting charge elements into the charge storage structure from the first interfacial region; and
generating a charge mobility region along the second plane of the multi-gated active structure during a read of the charge storage region.
8. The method of claim 7 , wherein injecting further comprises:
moving charge elements along a first portion of the first interfacial region, wherein the first portion of the first interfacial region is closer to the first control gate than to the second control gate;
moving charge elements along a second portion of the first interfacial region, wherein the second portion of the first interfacial region is closer to the second control gate than the first control gate; and;
generating an electric field between the first and second portions of the first interfacial region to accelerate the charge elements, wherein injection of the charge elements into the first region occurs at a third portion of the first interfacial region associated with the second control gate in response to the charge elements accelerating through the electric field, wherein the third portion of the first interfacial region is between the first and second portions of the first interfacial region.
9. The method of claim 7 , wherein generating the charge mobility region comprises biasing a non-volatile memory device comprising the change storage region to move charge elements to be sensed along the second plane, the method further comprising, sensing the charge elements moved along the second interfacial region.
10. The method of claim 9 , wherein the second plane is at a second interfacial region.
11. The method of claim 10 , wherein the second interfacial region is formed between the second surface of the multigated active structure and a dielectric.
12. The method of claim 5 further comprising:
forming a dielectric structure adjacent the multi-gated structure, wherein the multi-gate active structure is between the dielectric structure and the charge storage structure.
13. The method of claim 1 , further comprising:
generating an electric field in a region between the first and second control gates; and
accelerating charge elements in the electric field to facilitate injecting first charge elements into a first storage region.
14. The method of claim 13 , wherein the method further comprises:
generating an electric field in a region between the first and second control gates; and
accelerating charge elements in the electric field to facilitate injecting second charge elements into a second storage region.
15. The method of claim 14 , wherein the method further comprises:
injecting the first and second charge elements into the charge storage structure through a first interfacial region.
16. The method of claim 13 , wherein generating the electric field comprises providing a first potential on the first control gate and providing a second potential on the second control gate, wherein the second potential is less than the first potential.
17. The method of claim 1 wherein forming the first control gate and forming the second control gate are part of forming a multi-gate stack that further comprises forming a dielectric layer between the first control gate and the second control gate.
18. The method of claim 17 , wherein the charge storage structure is a first charge storage structure formed adjacent to a first sidewall of the multi-gate stack; and claim 17 further comprising:
forming a second charge storage structure adjacent to, and continuous along a second sidewall of the multi-gate stack, wherein the first and second sidewalls of the multi-gate stack are opposing sidewalls and a major surface of the second charge storage structure is substantially perpendicular to the major surface of the substrate.
19. The method of claim 18 , wherein the charge storage structure comprises discontinuous storage elements.