Electronic apparatus interconnect routing
View Patent ↗Apparatus are provided for routing interconnects of a dual-gate electronic device operating in a differential configuration. An electronic apparatus formed on a substrate is provided comprising a first interconnect ( 40, 42, 44 ) configured to couple to a first region of the substrate, a first gate ( 22, 24, 26, 28 ) coupled to the first interconnect and configured to receive a first differential input, a second interconnect ( 30, 32, 34, 36, 38 ) parallel to the first interconnect and configured to couple to a second region of the substrate, and a second gate ( 20 ) coupled to the second interconnect and configured to receive a second differential input. The first gate is parallel to the first interconnect, and the second gate is parallel to the second interconnect.
1. An electronic apparatus formed on a substrate, the electronic apparatus comprising:
a first set of polysilicon fingers coupled to the substrate at a first level and configured to receive a first differential input signal;
a first interconnect formed of a first metal layer and coupled to the first set of polysilicon fingers and having a first lengthwise axis;
a second set of polysilicon fingers coupled to the substrate at the first level and interdigitated with the first set of polysilicon fingers, wherein the second set of polysilicon fingers is configured to receive a second differential input signal; and
a second interconnect formed of a second metal layer that is a different layer from the first metal layer, the second interconnect being coupled to the second set of polysilicon fingers and having a second lengthwise axis, the second lengthwise axis parallel to the first lengthwise axis, and the first lengthwise axis different from the second lengthwise axis.
2. The electronic apparatus of claim 1 , wherein the first level is a substrate level.
3. The electronic apparatus of claim 1 , wherein the first level is above a substrate level and below the first metal layer and the second metal layer.
4. The electronic apparatus according to claim 1 , wherein the first set of polysilicon fingers has a first polysilicon finger at a first end of the first set of polysilicon fingers, and a last polysilicon finger at a second end of the first set of polysilicon fingers, and
wherein the first interconnect has a first end in proximity to the first polysilicon finger of the first set of polysilicon fingers, and a second end in proximity to the last polysilicon finger of the first set of polysilicon fingers, and wherein the first interconnect is configured to provide the first differential input to the first set of polysilicon fingers, wherein the first differential input diverges from the first end and the second end of the first interconnect.
5. The electronic apparatus according to claim 4 , wherein the second set of polysilicon fingers has a first polysilicon finger at a first end of the second set of polysilicon fingers, and a last polysilicon finger at a second end of the second set of polysilicon fingers, and
wherein the second interconnect has a first end in proximity to the first polysilicon finger of the second set of polysilicon fingers, and a second end in proximity to the last polysilicon finger of the second set of polysilicon fingers, and wherein the second interconnect is configured to provide the second differential input to the second set of polysilicon fingers, wherein the second differential input diverges from the first end and the second end of the second interconnect.
6. The electronic apparatus according to claim 1 , further comprising:
a third set of polysilicon fingers coupled to the substrate at the first level; and
wherein the second interconnect has a first side coupled to the second set of polysilicon fingers and parallel with the second lengthwise axis, and an opposed second side coupled to the third set of polysilicon fingers and parallel with the second lengthwise axis.
7. The electronic apparatus according to claim 6 , further comprising:
a fourth set of polysilicon fingers coupled to the substrate at the first level and interdigitated with the third set of polysilicon fingers; and
a third interconnect formed of the first metal layer and coupled to each polysilicon finger of the fourth set of polysilicon fingers, wherein the third interconnect has a third lengthwise axis that is perpendicular to lengthwise axes of the fourth set of polysilicon fingers, a first end in proximity to a first polysilicon finger of the fourth set of polysilicon fingers, and a second end in proximity to a last polysilicon finger of the fourth set of polysilicon fingers.
8. The electronic apparatus of claim 1 , further comprising:
a third interconnect coupled to the first interconnect and the first set of polysilicon fingers, the third interconnect having a third lengthwise axis that is perpendicular to the first lengthwise axis of the first interconnect, wherein the third interconnect is formed of a different layer from the second metal layer; and
a fourth interconnect coupled to the second interconnect and the second set of polysilicon fingers, the fourth interconnect having a fourth lengthwise axis that is perpendicular to the second lengthwise axis of the second interconnect.
9. An electronic apparatus formed on a substrate, the electronic apparatus comprising:
a first plurality of polysilicon fingers coupled to the substrate at a first level, wherein the first plurality of polysilicon fingers are elongated along first lengthwise axes;
a first interconnect formed of a first metal layer and coupled to each polysilicon finger of the first plurality of polysilicon fingers, wherein the first interconnect has a first lengthwise axis that is perpendicular to the first lengthwise axes of the first plurality of polysilicon fingers;
a second plurality of polysilicon fingers coupled to the substrate at the first level and interdigitated with the first plurality of polysilicon fingers, wherein the second plurality of polysilicon fingers are elongated along second lengthwise axes that are parallel with the first lengthwise axes of the first plurality of polysilicon fingers; and
a second interconnect formed of a second metal layer that is a different layer from the first metal layer, the second interconnect being coupled to each polysilicon finger of the second plurality of polysilicon fingers, wherein the second interconnect has a second lengthwise axis that is perpendicular to the second lengthwise axes of the second plurality of polysilicon fingers, and the second lengthwise axis is parallel to and different from the first lengthwise axis.
10. The electronic apparatus of claim 9 , wherein the first level is a substrate level.
11. The electronic apparatus of claim 9 , wherein the first level is above a substrate level and below the first metal layer and the second metal layer.
12. The electronic apparatus according to claim 9 , wherein the first plurality of polysilicon fingers has a first polysilicon finger at a first end of the first plurality of polysilicon fingers, and a last polysilicon finger at a second end of the first plurality of polysilicon fingers, and
wherein the first interconnect has a first end in proximity to the first polysilicon finger of the first plurality of polysilicon fingers, and a second end in proximity to the last polysilicon finger of the first plurality of polysilicon fingers, and wherein the first interconnect is configured to provide a first differential input to the first plurality of polysilicon fingers, wherein the first differential input diverges from the first end and the second end of the first interconnect.
13. The electronic apparatus according to claim 12 , wherein the second plurality of polysilicon fingers has a first polysilicon finger at a first end of the second plurality of polysilicon fingers, and a last polysilicon finger at a second end of the second plurality of polysilicon fingers, and
wherein the second interconnect has a first end in proximity to the first polysilicon finger of the second plurality of polysilicon fingers, and a second end in proximity to the last polysilicon finger of the second plurality of polysilicon fingers, and wherein the second interconnect is configured to provide a second differential input to the second plurality of polysilicon fingers, wherein the second differential input diverges from the first end and the second end of the second interconnect.
14. The electronic apparatus according to claim 9 , further comprising:
a third plurality of polysilicon fingers coupled to the substrate at the first level; and
wherein the second interconnect has a first side coupled to the second plurality of polysilicon fingers and parallel with the second lengthwise axis, and an opposed second side coupled to the third plurality of polysilicon fingers and parallel with the second lengthwise axis.
15. The electronic apparatus according to claim 14 , further comprising:
a fourth plurality of polysilicon fingers coupled to the substrate at the first level and interdigitated with the third plurality of polysilicon fingers; and
a third interconnect formed of the first metal layer and coupled to each polysilicon finger of the fourth plurality of polysilicon fingers, wherein the third interconnect has a third lengthwise axis that is perpendicular to lengthwise axes of the fourth plurality of polysilicon fingers, a first end in proximity to a first polysilicon finger of the fourth plurality of polysilicon fingers, and a second end in proximity to a last polysilicon finger of the fourth plurality of polysilicon fingers.
16. The electronic apparatus of claim 9 , further comprising:
a third interconnect coupled to the first interconnect and the first plurality of polysilicon fingers, the third interconnect having a third lengthwise axis that is perpendicular to the first lengthwise axis of the first interconnect, wherein the third interconnect is formed of a different layer from the second metal layer; and
a fourth interconnect coupled to the second interconnect and the second plurality of polysilicon fingers, the fourth interconnect having a fourth lengthwise axis that is perpendicular to the second lengthwise axis of the second interconnect.
17. The electronic apparatus of claim 16 , further comprising:
an air bridge between the third interconnect and the second interconnect.
18. The electronic apparatus of claim 9 , further comprising:
a third interconnect coupled to the first interconnect and the first plurality of polysilicon fingers, the third interconnect having a third lengthwise axis that is perpendicular to the first lengthwise axis of the first interconnect; and
a fourth interconnect coupled to the second interconnect and the second plurality of polysilicon fingers, the fourth interconnect having a fourth lengthwise axis that is perpendicular to the second lengthwise axis of the second interconnect, the second interconnect located on a penultimate layer of the plurality of layers, and the third interconnect located on a top-most layer of the plurality of layers.
19. The electronic apparatus of claim 18 , further comprising:
an air bridge between the third interconnect and the second interconnect.
20. An electronic apparatus according to claim 9 , wherein the substrate is selected from the group consisting of silicon, silicon-on-insulator, and a III-IV metal.