Digital adaptive feedforward harmonic distortion compensation for digitally controlled power stage
View Patent ↗Systems and method to compress digital video based on human factors expressed as a desirability score are provided. A particular method includes passing a digital input signal through a pulse-width modulator and passing an output of the pulse-width modulator through a power switching device. An output of the power switching device has a plurality of pulses. The method includes receiving the output of the power switching device at a first input of a comparator and receiving a reference voltage at a second input of the comparator. The method includes determining a net signal based on an output of the comparator and determining a timing error signal based on the net signal and the digital input signal. The method also includes adjusting the digital input signal to compensate for harmonic distortion based at least in part on the timing error signal.
1. A digital audio amplifier, comprising:
a switching power stage;
a pulse width modulator coupled to the switching power stage; and
a controller comprising:
at least one comparator to receive an output of the switching power stage, the at least one comparator generating a comparator output, the comparator output at least partially determined by the output of the switching power stage and a reference voltage;
at least one digital counter configured to receive the comparator output, the at least one digital counter configured to count a width of one or more pulses in the comparator output and to determine a net pulse signal; and
a circuit in communication with the at least one digital counter, the circuit comparing a signal derived from an input signal to the pulse width modulator to the net pulse signal to generate an error signal to be used for harmonic distortion compensation of the input signal.
2. The digital audio amplifier of claim 1 , further comprising a low pass filter coupled to the switching power stage and a load coupled to the low pass filter.
3. The digital audio amplifier of claim 1 , wherein the controller comprises a delay line to delay the signal derived from the input signal by a number of cycles so that the circuit compares a portion of the input signal that corresponds to the net pulse signal.
4. The digital audio amplifier of claim 3 , wherein the circuit subtracts the net pulse signal from the signal derived from the input signal to generate the error signal.
5. The digital audio amplifier of claim 1 , wherein the controller comprises a processing module that receives the error signal and uses the error signal to populate a look-up table for use with respect to the harmonic distortion compensation of the input signal.
6. The digital audio amplifier of claim 1 , wherein the at least one digital counter comprises a first counter that counts positive pulses of the output of the switching power stage and a second counter that counts negative pulses of the output of the switching power stage, wherein the net pulse signal is determined by a difference of the first counter and the second counter.
7. The digital audio amplifier of claim 1 , wherein the controller comprises a voltage divider to receive the output of the switching power stage and to provide a low-voltage signal output to the at least one comparator.
8. The digital audio amplifier of claim 7 , wherein the at least one comparator re-shapes the low-voltage signal output from the voltage divider by comparing the low-voltage signal output from the voltage divider to a direct current (DC) reference voltage.
9. The digital audio amplifier of claim 8 , wherein the DC reference voltage is derived from a power supply.
10. The digital audio amplifier of claim 1 , wherein the error signal corresponds to a timing error of the switching power stage.
11. The digital audio amplifier of claim 1 , wherein a time resolution of the at least one digital counter is less than or equal to about 5 nanoseconds.
12. A method of compensating for harmonic distortion in a digital audio amplifier, the method comprising:
estimating an initial phase and an amplitude of an input signal;
passing an output of a pulse-width modulator through a power switching device, an output of the power switching device having a plurality of pulses each having a width;
receiving the output of the power switching device at a first input of a comparator;
receiving a reference voltage at a second input of the comparator;
determining, based on an output of the comparator, a net signal;
comparing the net signal to a pulse-width modulator input signal to determine an error signal, the error signal at least partially derived from a power stage responsive to the input signal;
determining at least one harmonic coefficient of the input signal from the estimated initial phase, the estimated amplitude of the input signal, and the error signal;
updating a look-up table based on the error signal and the at least one harmonic coefficient; and
modifying the input signal based at least in part on the at least one harmonic coefficient.
13. The method of claim 12 , further comprising:
passing the modified input signal through an interpolator to produce an interpolated signal;
noise-shaping the interpolated signal to produce a noise-shaped signal;
pulse-width modulating the noise-shaped signal to produce a pulse-width modulated signal;
driving the power stage with the pulse-width modulated signal; and
low-pass filtering an output of the power stage to provide an output deliverable to a load.
14. The method of claim 12 , wherein modifying the input signal comprises adding the at least one harmonic coefficient to the input signal.
15. The method of claim 12 , wherein determining the at least one harmonic coefficient of the input signal comprises interpolating the at least one harmonic coefficient from two harmonic coefficients stored in the look-up table.