Method and system for processing multipath signals to suppress interface utilizing a programmable interface suppression module
Multipath signals are processed to suppress interference utilizing a programmable interface suppression module. One or more circuits that are operable to retrieve at least a portion of stored data from a memory, wherein the stored data corresponds to signals received via a particular receiving antenna and assigned to a particular finger in a rake receiver. A plurality of weighting factor values may be computed based on one or more signals received via the particular receiving antenna. Estimated signals may be generated based on the portion of stored data and the plurality of weighting factors. Residual signals may be generated based on the portion of stored data and the estimated signals. The portion of stored data may be replaced in the memory with corresponding data generated utilizing the residual signals. A plurality of interference suppressed signals may be generated based on the plurality of residual signals.
1. A method for digital signal processing, the method comprising:
performing by one or more processors and/or circuits:
retrieving at least a portion of stored data from a memory, wherein said stored data corresponds to signals received via a particular receiving antenna and assigned to a particular finger in a rake receiver;
computing a plurality of weighting factor values based on one or more signals received via said particular receiving antenna;
generating estimated signals based on said retrieved at least a portion of stored data and said computed plurality of weighting factor values;
generating residual signals based on said at least a portion of stored data and said estimated signals;
replacing said at least a portion of stored data in said memory with corresponding data that is generated based on said generated residual signals; and
generating a plurality of interference suppressed signals based on said generated residual signals.
2. The method according to claim 1 , comprising generating said estimated signals based on an assigned pseudo noise sequence.
3. The method according to claim 2 , comprising generating said residual signals based on one or more non-assigned estimated signals, wherein said one or more non-assigned estimated signals are generated based on one or more non-assigned pseudo noise sequences, wherein said one or more non-assigned pseudo noise sequences are distinct from said assigned pseudo noise sequence.
4. The method according to claim 3 , comprising generating said residual signal based on a sum of data from said estimated signal and data from said one or more non-assigned estimated signals.
5. The method according to claim 1 , comprising retrieving said corresponding data from said memory.
6. The method according to claim 5 , comprising generating updated estimated signals based on said retrieved corresponding data, said estimated data signals and said plurality of weighting factor values.
7. The method according to claim 6 , comprising generating incremental signals based on said updated estimated signals and said estimated data signals.
8. The method according to claim 7 , comprising replacing said corresponding data with updated corresponding data in said memory, wherein said updated corresponding data is generated based on said incremental signals and one or more non-assigned incremental signals, wherein said incremental signals are generated based on an assigned pseudo noise sequence and said one or more non-assigned incremental signals are generated based on one or more non-assigned pseudo noise sequences, wherein said one or more non-assigned pseudo noise sequences are distinct from said assigned pseudo noise sequence.
9. The method according to claim 8 , comprising retrieving said updated corresponding data from said memory.
10. The method according to claim 9 , comprising generating said plurality of interference suppressed signals based on said retrieved updated corresponding data and said updated estimated signals.
11. A system for digital signal processing, the system comprising:
one or more circuits that are operable to retrieve at least a portion of stored data from a memory, wherein said stored data corresponds to signals received via a particular receiving antenna and assigned to a particular finger in a rake receiver;
said one or more circuits are operable to compute a plurality of weighting factor values based on one or more signals received via said particular receiving antenna;
said one or more circuits are operable to generate estimated signals based on said retrieved at least a portion of stored data and said computed plurality of weighting factor values;
said one or more circuits are operable to generate residual signals based on said at least a portion of stored data and said estimated signals;
said one or more circuits are operable to replace said at least a portion of stored data in said memory with corresponding data that is generated based on said generated residual signals; and
said one or more circuits are operable to generate a plurality of interference suppressed signals based on said generated residual signals.
12. The system according to claim 11 , wherein said one or more circuits are operable to generate said estimated signals based on an assigned pseudo noise sequence.
13. The system according to claim 12 , wherein said one or more circuits are operable to generate said residual signals based on one or more non-assigned estimated signals, wherein said one or more non-assigned estimated signals are generated based on one or more non-assigned pseudo noise sequences, wherein said one or more non-assigned pseudo noise sequences are distinct from said assigned pseudo noise sequence.
14. The system according to claim 13 , wherein said one or more circuits are operable to generate said residual signal based on a sum of data from said estimated signal and data from said one or more non-assigned estimated signals.
15. The system according to claim 11 , wherein said one or more circuits are operable to retrieve said corresponding data from said memory.
16. The system according to claim 15 , wherein said one or more circuits are operable to generate updated estimated signals based on said retrieved corresponding data, said estimated data signals and said plurality of weighting factor values.
17. The system according to claim 16 , wherein said one or more circuits are operable to generate incremental signals based on said updated estimated signals and said estimated data signals.
18. The system according to claim 17 , wherein said one or more circuits are operable to replace said corresponding data with updated corresponding data in said memory, wherein said updated corresponding data is generated based on said incremental signals and one or more non-assigned incremental signals, wherein said incremental signals are generated based on an assigned pseudo noise sequence and said one or more non-assigned incremental signals are generated based on one or more non-assigned pseudo noise sequences, wherein said one or more non-assigned pseudo noise sequences are distinct from said assigned pseudo noise sequence.
19. The system according to claim 18 , wherein said one or more circuits are operable to retrieve said updated corresponding data from said memory.
20. The system according to claim 19 , wherein said one or more circuits are operable to generate said plurality of interference suppressed signals based on said retrieved updated corresponding data and said updated estimated signals.