IP Library Granted Patent US 8,004,902
Granted Patent B2
US 8,004,902 · App. 12/619,952 · Granted Aug 23, 2011

Nonvolatile semiconductor memory device

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Quick Facts
Patent No.
US 8,004,902
App. No.
12/619,952
Granted
Aug 23, 2011
Kind
B2
Abstract

A nonvolatile memory device includes a memory cell that stores data by presence or absence of electrons accumulated in a floating gate, a read reference current generator that generates a read reference current for reading data from the memory cell based on a constant current from a constant current generator included therein, and a read voltage generator that generates a read voltage to be applied to a control gate of the memory cell during data reading. The read reference current generator generates a monitor voltage that varies according to variation of the read reference current and a threshold voltage of the memory cell. The read voltage generator generates the read voltage based on the monitor voltage.

Claims (17)

1. A nonvolatile memory device comprising:

a memory cell that includes a floating gate and a control gate, and stores data by presence or absence of electrons accumulated in the floating gate;

a read reference current generator that generates a read reference current for reading data from the memory cell based on a constant current from a constant current generator included in the read reference current generator; and

a read voltage generator that generates a read voltage to be applied to the control gate of the memory cell during data reading, wherein

the read reference current generator generates a monitor voltage varying according to variation of the read reference current and a threshold voltage of the memory cell, and

the read voltage generator generates the read voltage based on the monitor voltage.

2. The nonvolatile memory device according to claim 1 , wherein

the read reference current generator includes a current mirror circuit that generates the read reference current based on the constant current from the constant current generator,

a dummy transistor forming the current mirror circuit has the same structure as a transistor forming the memory cell, and

the monitor voltage is a gate-source voltage of the dummy transistor.

3. The nonvolatile memory device according to claim 1 , wherein the read reference current generator comprises:

a first current mirror circuit that generates the read reference current based on the constant current from the constant current generator;

a dummy transistor that has the same structure as a transistor forming the memory cell, a gate-source voltage of the dummy transistor being the monitor voltage; and

a second current mirror circuit that supplies the constant current from the constant current generator to the dummy transistor.

4. The nonvolatile memory device according to claim 1 , wherein the memory cell is a flash memory.

5. The nonvolatile memory device according to claim 1 , wherein the memory cell is an EEPROM (Electrically Erasable and Programmable Read Only Memory).

6. The nonvolatile memory device according to claim 1 , wherein the read voltage generator generates the read voltage by amplifying the monitor voltage using a non-inverting amplifier.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025193/0138 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 17, 2009
From: AMANAI, MASAKAZU; KASHIMURA, MASAHIKO; NAGAI, YOSHIHIRO; TAKI, MASATO; HONDA, NORIHIRO; YAMANAKA, KAZUSHI
To: NEC ELECTRONICS CORPORATION; TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 023529/0334 →