IP Library Granted Patent US 8,274,087
Granted Patent B2
US 8,274,087 · App. 12/619,972 · Granted Sep 25, 2012

Nitride semiconductor substrate and manufacturing method of the same

Assignee: Hitachi Cable Ltd.
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Quick Facts
Patent No.
US 8,274,087
App. No.
12/619,972
Granted
Sep 25, 2012
Kind
B2
Abstract

To improve an adhesion to a substrate holder, and improve a device production yield by uniformizing a temperature distribution in a surface of a substrate and uniformizing characteristics such as a film thickness. When a concave warpage is set to be negative on a substrate front side, and a convex warpage is set to be positive on the substrate front side, then a line segment is drawn from one end of a substrate rear surface to the other end of the substrate rear surface, passing through a substrate center line, and a substrate is sliced by this line segment in a substrate thickness direction, a maximum value of shortest values of a distance from an arbitrary point on the drawn line segment to a rear side outline in a sliced surface, is defined as warpage H in a diameter direction, and when the warpage H in the diameter direction is obtained in a substrate peripheral direction, with its maximum value set to be Hmax, and its minimum value set to be Hmin, the warpage H in the diameter direction is defined to satisfy Hmax−Hmin≦30 μm.

Claims (10)

1. A nitride semiconductor substrate, wherein when a concave warpage is set to be negative on a substrate front side, and a convex warpage is set to be positive on the substrate front side, which is a crystal growth surface side of the substrate, then a line segment is drawn from one end of a substrate rear surface to an opposing end of the substrate rear surface, which is a surface opposite side to the substrate front side, passing through a substrate center line, and the substrate is sliced by this line segment in a substrate thickness direction, a maximum value of shortest values of a distance from an arbitrary point on the line segment to a rear side outline in a sliced surface, is defined as warpage H in a diameter direction, and when the warpage H in the diameter direction is obtained in a substrate peripheral direction, with its maximum value set to be Hmax, and its minimum value set to be Hmin in the warpage H in the diameter direction in the surface of the substrate rear surface, the warpage H in the diameter direction is defined to satisfy Hmax−Hmin≦30 μm.

2. The nitride semiconductor substrate according to claim 1 , wherein the warpage H in the diameter direction is defined to satisfy Hmax−Hmin≦20 μm.

3. The nitride semiconductor substrate according to claim 1 , wherein the nitride semiconductor substrate is a gallium nitride (GaN) substrate.

4. The nitride semiconductor substrate according to claim 1 , wherein the nitride semiconductor substrate is a gallium nitride (GaN) freestanding substrate.

5. A nitride semiconductor substrate comprising:

a substrate front side, the substrate front side a crystal growth surface side; and

a substrate rear side, the substrate rear side an opposite side to the substrate front side, wherein a concave warpage is set to be negative on the substrate front side, a convex warpage is set to be positive on the substrate front side, and a line segment is drawn from one end of the substrate rear side to an opposing end of the substrate rear side, the line segment passing through a center line of the substrate and slicing the substrate in a substrate thickness direction, and a maximum value of shortest values of a distance from an arbitrary point on the line segment to a rear side outline in the sliced substrate, is defined as warpage H in a diameter direction, and when the warpage H in the diameter direction is obtained in a substrate peripheral direction, with its maximum value set to be Hmax, and its minimum value set to be Hmin in the warpage H in the diameter direction in the surface of the substrate rear side, the warpage H in the diameter direction is defined to satisfy Hmax−Hmin≦30 μm.

6. The nitride semiconductor substrate according to claim 5 , wherein the warpage H in the diameter direction is defined to satisfy Hmax−Hmin≦20 μm.

7. The nitride semiconductor substrate according to claim 5 , wherein the nitride semiconductor substrate is a gallium nitride (GaN) substrate.

8. The nitride semiconductor substrate according to claim 5 , wherein the nitride semiconductor substrate is a gallium nitride (GaN) freestanding substrate.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2016
From: SCIOCS COMPANY LIMITED
To: SUMITOMO CHEMICAL COMPANY, LIMITED
Reel/Frame 037524/0275 →
CORPORATE SPLIT AND CONFIRMATORY ASSIGNMENT EFFECTIVE APRIL 1, 2015 Recorded Jul 20, 2015
From: HITACHI METALS, LTD.
To: SCIOCS COMPANY LIMITED
Reel/Frame 036134/0081 →
MERGER Recorded Dec 22, 2014
From: HITACHI CABLE, LTD.
To: HITACHI METALS, LTD.
Reel/Frame 034565/0727 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2009
From: YAMAMOTO, SHUNSUKE
To: HITACHI CABLE, LTD.
Reel/Frame 023550/0483 →
Priority Claims (1)
JP 2009-123018 · May 21, 2009 · national
Continuity (1)
Related Publication 20100295055A1 · Nov 25, 2010