Methods and apparatus for inductors with integrated passive and active elements
An integrated circuit is described. The integrated circuit includes an inductor that has a large empty area in the center of the inductor. The integrated circuit also includes additional circuitry. The additional circuitry is located within the large empty area in the center of the inductor. The additional circuitry may include a capacitor bank, transistors, electrostatic discharge (ESD) protection circuitry and other miscellaneous passive or active circuits.
1. An integrated circuit comprising:
an inductor comprising a coil portion and an empty area in the center of the coil portion, wherein the inductor is a degeneration inductor that is part of a low noise amplifier (LNA);
additional circuitry, wherein the additional circuitry is located within the empty area in the center of the coil portion, wherein the additional circuitry is arranged such that an impact of the additional circuitry on an inductance and a quality factor of the inductor is minimized, and wherein the additional circuitry comprises a resistor capacitor (RC) clamp; and
routing lines connected to the additional circuitry that extend across the coil portion and that are positioned to reduce inductive coupling between the additional circuitry and the inductor.
2. An integrated circuit comprising:
an inductor comprising a coil portion and an empty area in the center of the coil portion, wherein the inductor is a degeneration inductor that is part of a low noise amplifier (LNA);
additional circuitry, wherein the additional circuitry is located within the empty area in the center of the coil portion, wherein the additional circuitry is arranged such that an impact of the additional circuitry on an inductance and a quality factor of the inductor is minimized, and wherein the additional circuitry comprises an electrostatic discharge (ESD) pad; and
routing lines connected to the additional circuitry that extend across the coil portion and that are positioned to reduce inductive coupling between the additional circuitry and the inductor.
3. An integrated circuit comprising:
an inductor comprising a coil portion and an empty area in the center of the coil portion, wherein the inductor is a degeneration inductor that is part of a low noise amplifier (LNA);
additional circuitry, wherein the additional circuitry is located within the empty area in the center of the coil portion, wherein the additional circuitry is arranged such that an impact of the additional circuitry on an inductance and a quality factor of the inductor is minimized, and wherein the additional circuitry comprises electrostatic discharge (ESD) lines; and
routing lines connected to the additional circuitry that extend across the coil portion and that are positioned to reduce inductive coupling between the additional circuitry and the inductor.
4. An integrated circuit comprising:
an inductor comprising a coil portion and an empty area in the center of the coil portion, wherein the inductor is a balun;
additional circuitry, wherein the additional circuitry is located within the empty area in the center of the coil portion, wherein the additional circuitry is arranged such that an impact of the additional circuitry on an inductance and a quality factor of the inductor is minimized; and
routing lines connected to the additional circuitry that extend across the coil portion and that are positioned to reduce inductive coupling between the additional circuitry and the inductor.
5. The integrated circuit of claim 4 , wherein the additional circuitry comprises at least one of input tuning capacitors, output tuning capacitors, a ground pad, a supply pad, and electrostatic discharge (ESD) protection structures for the supply pad.
6. A method for providing circuitry within an inductor, the method comprising:
providing an inductor on an integrated circuit, the inductor comprising a coil portion and an empty area in the center of the coil portion, wherein the inductor is a degeneration inductor that is part of a low noise amplifier (LNA);
providing additional circuitry within the inductor, wherein the additional circuitry is located within the empty area in the center of the coil portion, wherein the additional circuitry is arranged such that an impact of the additional circuitry on an inductance and a quality factor of the inductor is minimized, and wherein the additional circuitry comprises a resistor capacitor (RC) clamp; and
providing routing lines connected to the additional circuitry that extend across the coil portion and that are positioned to reduce inductive coupling between the additional circuitry and the inductor.
7. A method for providing circuitry within an inductor, the method comprising:
providing an inductor on an integrated circuit, the inductor comprising a coil portion and an empty area in the center of the coil portion, wherein the inductor is a degeneration inductor that is part of a low noise amplifier (LNA);
providing additional circuitry within the inductor, wherein the additional circuitry is located within the empty area in the center of the coil portion, wherein the additional circuitry is arranged such that an impact of the additional circuitry on an inductance and a quality factor of the inductor is minimized, and wherein the additional circuitry comprises an electrostatic discharge (ESD) pad; and
providing routing lines connected to the additional circuitry that extend across the coil portion and that are positioned to reduce inductive coupling between the additional circuitry and the inductor.
8. A method for providing circuitry within an inductor, the method comprising:
providing an inductor on an integrated circuit, the inductor comprising a coil portion and an empty area in the center of the coil portion, wherein the inductor is a degeneration inductor that is part of a low noise amplifier (LNA);
providing additional circuitry within the inductor, wherein the additional circuitry is located within the empty area in the center of the coil portion, wherein the additional circuitry is arranged such that an impact of the additional circuitry on an inductance and a quality factor of the inductor is minimized, and wherein the additional circuitry comprises electrostatic discharge (ESD) lines; and
providing routing lines connected to the additional circuitry that extend across the coil portion and that are positioned to reduce inductive coupling between the additional circuitry and the inductor.
9. A method for providing circuitry within an inductor, the method comprising:
providing an inductor on an integrated circuit, the inductor comprising a coil portion and an empty area in the center of the coil portion, wherein the inductor is a balun;
providing additional circuitry within the inductor, wherein the additional circuitry is located within the empty area in the center of the coil portion, wherein the additional circuitry is arranged such that an impact of the additional circuitry on an inductance and a quality factor of the inductor is minimized; and
providing routing lines connected to the additional circuitry that extend across the coil portion and that are positioned to reduce inductive coupling between the additional circuitry and the inductor.
10. The method of claim 9 , wherein the additional circuitry comprises at least one of input tuning capacitors, output tuning capacitors, a ground pad, a supply pad, and electrostatic discharge (ESD) protection structures for the supply pad.
11. An integrated circuit comprising:
an inductor comprising a coil portion and an empty area in the center of the coil portion, wherein the inductor has a stretched coil design;
additional circuitry, wherein the additional circuitry is located within the empty area in the center of the coil portion, wherein the additional circuitry is arranged such that an impact of the additional circuitry on an inductance and a quality factor of the inductor is minimized; and
routing lines connected to the additional circuitry that extend across the coil portion and that are positioned to reduce inductive coupling between the additional circuitry and the inductor.
12. The integrated circuit of claim 11 ,
wherein the additional circuitry comprises a capacitor bank.
13. The integrated circuit of claim 11 ,
wherein the inductor is a tank inductor that is part of a voltage controlled oscillator (VCO).
14. The integrated circuit of claim 11 ,
wherein the inductor is a tank inductor that is part of a low noise amplifier (LNA).
15. The integrated circuit of claim 14 , wherein the additional circuitry comprises a tuning capacitor.
16. The integrated circuit of claim 14 , wherein the additional circuitry comprises a supply voltage pad.
17. The integrated circuit of claim 11 ,
wherein the inductor is a degeneration inductor that is part of a low noise amplifier (LNA).
18. The integrated circuit of claim 17 , wherein the additional circuitry comprises a ground pad.
19. A method for providing circuitry within an inductor, the method comprising:
providing an inductor on an integrated circuit, the inductor comprising a coil portion and an empty area in the center of the coil portion, wherein the inductor has a stretched coil design;
providing additional circuitry within the inductor, wherein the additional circuitry is located within the empty area in the center of the coil portion, wherein the additional circuitry is arranged such that an impact of the additional circuitry on an inductance and a quality factor of the inductor is minimized; and
providing routing lines connected to the additional circuitry that extend across the coil portion and that are positioned to reduce inductive coupling between the additional circuitry and the inductor.
20. The method of claim 19 ,
wherein the additional circuitry comprises a capacitor bank.
21. The method of claim 19 ,
wherein the inductor is a tank inductor that is part of a voltage controlled oscillator (VCO).
22. The method of claim 19 ,
wherein the inductor is a tank inductor that is part of a low noise amplifier (LNA).
23. The method of claim 22 , wherein the additional circuitry comprises a tuning capacitor.
24. The method of claim 22 , wherein the additional circuitry comprises a supply voltage pad.
25. The method of claim 19 ,
wherein the inductor is a degeneration inductor that is part of a low noise amplifier (LNA).
26. The method of claim 25 , wherein the additional circuitry comprises a ground pad.
27. An apparatus for providing circuitry within an inductor, comprising:
means for providing an inductor on an integrated circuit, wherein the inductor has a stretched coil design;
means for providing additional circuitry within the inductor, wherein the additional circuitry is located within the empty area in the center of the inductor, wherein the additional circuitry is arranged such that an impact of the additional circuitry on an inductance and a quality factor of the inductor is minimized, and wherein the additional circuitry comprises a capacitor bank; and
means for providing routing lines connected to the additional circuitry that extend across the inductor and that are positioned to reduce inductive coupling between the additional circuitry and the inductor.
28. The apparatus of claim 27 ,
wherein the additional circuitry comprises a capacitor bank.
29. The apparatus of claim 27 ,
wherein the inductor comprises a tank inductor that is part of a voltage controlled oscillator (VCO).