Method of forming a high capacitance diode and structure therefor
View Patent ↗In one embodiment, high doped semiconductor channels are formed in a semiconductor region of an opposite conductivity type to increase the capacitance of the device.
1. A high capacitance diode comprising:
a semiconductor substrate of a first conductivity type having first and second surfaces;
a first region of the first conductivity type adjacent the first surface of the semiconductor substrate, the first region having a first doping concentration;
a semiconductor layer of a second conductivity type adjacent the first region and overlying the semiconductor substrate, the semiconductor layer having a second doping concentration that is less than the first doping concentration and also having a first surface that is opposite to the first region;
a doped region on the first surface of the semiconductor layer having approximately the first doping concentration; and
a plurality of semiconductor channels of the second conductivity type extending from the doped region through the semiconductor layer and into the semiconductor substrate, the plurality of semiconductor channels having approximately the first doping concentration.
2. The high capacitance diode of claim 1 wherein the first doping concentration is approximately at least 1×10 19 atoms/cm 3 .
3. The high capacitance diode of claim 1 wherein the second doping concentration is at least two orders of magnitude less than the first doping concentration.
4. The high capacitance diode of claim 1 wherein the plurality of semiconductor channels are spaced approximately 0.6 to 2.0 microns apart and have a width of approximately 0.4 to 2.0 microns.
5. The high capacitance diode of claim 1 wherein the doped region has the second conductivity type.
6. The high capacitance diode of claim 1 wherein the doped region has the first conductivity type.
7. The high capacitance diode of claim 1 wherein the first region is a portion of the semiconductor substrate that has the first doping concentration.
8. The high capacitance diode of claim 1 wherein the first region is another semiconductor layer that is formed on the first surface of the semiconductor substrate.
9. The high capacitance diode of claim 1 further including an isolation trench extending from the first surface of the semiconductor layer into the semiconductor substrate, the isolation trench forming a closed polygon on the first surface of the semiconductor layer wherein the closed polygon encloses the doped region.
10. The high capacitance diode of claim 9 further including another high capacitance diode formed on the semiconductor substrate and external to the closed polygon.