Method for fabricating PIP capacitor
View Patent ↗A PIP capacitor and methods thereof. A method of fabricating a PIP capacitor may include forming a field oxide film over a silicon substrate to define a device isolating region and/or an active region. A method of fabricating a PIP capacitor may include forming a lower polysilicon electrode having doped impurities on and/or over an field oxide film. A method of fabricating a PIP capacitor may include performing an oxidizing step to form a first oxide film over a polysilicon and/or a second oxide film on and/or over an active region. A method of fabricating a PIP capacitor may include forming an upper polysilicon electrode on and/or over a region of a first oxide film and forming a gate electrode on and/or over a second oxide film at substantially the same time. A method of fabricating a PIP capacitor may include forming a polysilicon resistor. A PIP capacitor is disclosed.
1. A method comprising:
forming a field oxide film over a semiconductor substrate defining a device isolating region and an active region;
forming a lower polysilicon electrode and a polysilicon resistor having doped impurities over said field oxide film;
performing an oxidizing step to form oxide films over said polysilicon electrode, said polysilicon resistor and said active region;
forming an upper polysilicon electrode over a region of said oxide film formed over said lower polysilicon electrode and forming a gate electrode over said oxide film formed over said active region at substantially the same time,
wherein said oxide film over said lower polysilicon electrode is thicker than said oxide films formed over at least one of said polysilicon resistor and said active region.
2. The method of claim 1 , wherein said semiconductor substrate comprises silicon.
3. The method of claim 1 , wherein said oxide films are formed over at least one of tops and side walls of said lower polysilicon electrode and said polysilicon resistor.
4. The method of claim 1 , wherein forming said lower polysilicon electrode and said polysilicon resistor comprises:
depositing a polysilicon layer over a surface of said semiconductor substrate including said field oxide film;
injecting impurity ions into a region of said polysilicon layer; and
removing said polysilicon layer except a region of said polysilicon layer having said injected impurity ions and said polysilicon layer for said polysilicon resistor.
5. An apparatus comprising:
a field oxide film formed over a semiconductor substrate defining a device isolating region and an active region;
a lower polysilicon electrode including doped impurities formed over said field oxide film;
a first oxide film formed over said lower polysilicon electrode;
a second oxide film formed over said active region;
an upper polysilicon electrode formed over a region of said first oxide film and a gate electrode formed over a portion of said second oxide film at substantially the same time; and
a third oxide film formed over said polysilicon resistor,
wherein said oxide film over said lower polysilicon electrode is thicker than said oxide films formed over said polysilicon resistor and said active region.
6. The apparatus of claim 5 , wherein said semiconductor substrate comprises silicon.
7. The apparatus claim 5 , wherein said first oxide film is formed over at least one of a top and side walls of said lower polysilicon electrode.
8. The apparatus of claim 5 , wherein said first oxide film is thicker than said second oxide film.
9. The apparatus of claim 5 , comprising:
a selectively etched region of said first oxide film to expose a portion of said lower polysilicon electrode; and
silicide formed over at least one of a portion of said upper polysilicon electrode and said exposed portion of said lower polysilicon electrode.
10. The apparatus of claim 5 , wherein said oxide film comprises a thickness which increases as a concentration of said impurities increases.
11. The apparatus of claim 5 , comprising a polysilicon resistor having doped impurities over said field oxide film.