IP Library Granted Patent US 8,207,744
Granted Patent B2
US 8,207,744 · App. 12/646,736 · Granted Jun 26, 2012

Testing apparatus

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Quick Facts
Patent No.
US 8,207,744
App. No.
12/646,736
Granted
Jun 26, 2012
Kind
B2
Abstract

There is provided a testing apparatus including a plurality of test units, a storage that is shared by the plurality of test units, where the storage stores therein wafers under test to be tested by the plurality of test units, a transport mechanism that transports the wafers under test between the storage and each of the plurality of test units, a mainframe that specifies a test procedure for each of the plurality of test units, a power source that is shared by the plurality of test units, where the power source supplies power to each of the plurality of test units, and a pressure source that is shared by the plurality of test units, where the pressure source supplies a pressure to each of the plurality of test units. Here, each of the plurality of test units includes a test module that transmits and receives a test signal to/from a plurality of circuits formed on a wafer under test, a connector that connects together transmission paths of the test signal between the test module and the wafer under test, a holding member that brings the wafer under test into contact with the connector when supplied with the pressure, and a housing that houses therein the holding member and the connector, where the wafer under test is to be tested within the housing.

Claims (34)

1. A testing apparatus comprising:

a plurality of test units for testing a plurality of wafers under test in parallel, the number of test units being a multiple or divisor of the number of wafers stored in a wafer cassette;

a storage that is shared by the plurality of test units, the storage storing therein the wafers under test to be tested by the plurality of test units;

a transport mechanism that transports the wafers under test between the storage and each of the plurality of test units;

a mainframe that specifies a test procedure for each of the plurality of test units;

a power source that is shared by the plurality of test units, the power source supplying power to each of the plurality of test units; and

a pressure source that is shared by the plurality of test units, the pressure source supplying a pressure to each of the plurality of test units, wherein

each of the plurality of test units includes:

a test module that transmits and receives a test signal to/from a plurality of circuits formed on a wafer under test;

a connector that connects together transmission paths of the test signal between the test module and the wafer under test;

a holding member that brings the wafer under test into contact with the connector when supplied with the pressure; and

a housing that houses therein the holding member and the connector, the wafer under test to be tested within the housing,

when supplied with a negative pressure, the holding member attracts by suction the wafer under test to bring the wafer under test into contact with the connector,

the holding member contacts airtight with a smooth region of the wafer under test, at a peripheral edge portion of the wafer under test, that is adjacent to a circuit region in which the plurality of circuits are formed, in a vicinity of the circuit region, to attract the wafer under test by suction.

2. The testing apparatus as set forth in claim 1 , wherein each of the plurality of test units further includes

a valve that connects or disconnects communication between the pressure source and the holding member.

3. The testing apparatus as set forth in claim 1 , wherein each of the plurality of test units further includes

a power management section that stabilizes the power supplied from the power source.

4. The testing apparatus as set forth in claim 1 , wherein the test module has:

an individual cut-off device that interrupts an overcurrent from each of the plurality of circuits included in the wafer under test; and

a collective cut-off device that interrupts an overcurrent from the entire wafer under test.

5. The testing apparatus as set forth in claim 1 , wherein

all of the plurality of test units have the same structure.

6. The testing apparatus as set forth in claim 1 , wherein the plurality of test units are stacked vertically.

7. The testing apparatus as set forth in claim 6 , wherein the transport mechanism includes:

a guide pole positioned vertically; and

a manipulator operable to move up and down along the guide pole.

8. The testing apparatus as set forth in claim 7 , wherein the guide pole covers the entire height of the stacked plurality of test units.

9. The testing apparatus as set forth in claim 7 , wherein the manipulator includes:

a lift operable to move up and down along the guide pole;

a pantograph supported by the lift and operable to expand and contract while moving up and down; and

a chuck supported by the pantograph.

10. The testing apparatus as set forth in claim 9 , wherein the angles formed between the lift and the pantograph and between the

pantograph and the chuck can be changed.

Assignments (2)
CHANGE OF ADDRESS Recorded Dec 18, 2018
From: ADVANTEST CORPORATION
To: ADVANTEST CORPORATION
Reel/Frame 047987/0626 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2010
From: OKINO, MASUMI
To: ADVANTEST CORPORATION
Reel/Frame 024025/0766 →