Tamper resistant fuse design
View Patent ↗A tamper resistant fuse design is generally presented. In this regard, an apparatus is introduced comprising a plurality of fuses in an integrated circuit device to store values and a plurality of resistors in parallel to the fuses, wherein each fuse includes a parallel resistor to provide a potential dissipation path around the fuse. Other embodiments are also described and claimed.
1. An apparatus comprising:
a plurality of fuses in an integrated circuit device to store values; and
a plurality of resistors in parallel to the fuses, wherein each fuse includes a parallel resistor to provide a potential dissipation path around the fuse to obscure a voltage contrast between blown and unblown fuses.
2. The apparatus of claim 1 , wherein the resistors comprise unblown fuses having a higher resistance than the fuses when unblown and having a resistance less than an open circuit.
3. The apparatus of claim 1 , wherein the resistors comprise metal wires.
4. The apparatus of claim 3 , wherein the metal wires comprise platinum.
5. The apparatus of claim 3 , wherein the metal wires comprise tungsten.
6. The apparatus of claim 1 , wherein the fuses comprise antifuses.
7. The apparatus of claim 6 , wherein the resistors comprise unblown fuses having a higher resistance than blown antifuses and having a resistance less than an open circuit.
8. A microprocessor comprising:
a processing unit to process data;
a plurality of fuses to store values; and
a plurality of resistors in parallel to the fuses, wherein each fuse includes a parallel resistor to provide a potential dissipation path around the fuse to obscure a voltage contrast between blown and unblown fuses.
9. The microprocessor of claim 8 , wherein the stored values comprise an encryption key.
10. The microprocessor of claim 8 , wherein the resistors comprise unblown fuses having a higher resistance than the fuses when unblown and having a resistance less than an open circuit.
11. The microprocessor of claim 10 , wherein the resistors and the fuses comprise wires of different metals.
12. The microprocessor of claim 11 , wherein the resistors comprise a metal chosen from the group consisting of: platinum and tungsten.
13. The microprocessor of claim 8 , wherein the fuses comprise antifuses.
14. The microprocessor of claim 13 , wherein the resistors comprise unblown fuses having a higher resistance than blown antifuses and having a resistance less than an open circuit.
15. A system comprising:
a network controller;
a system memory; and
a microprocessor, wherein the microprocessor comprises:
a processing unit to process data;
a plurality of fuses to store values; and
a plurality of resistors in parallel to the fuses, wherein each fuse includes a parallel resistor to provide a potential dissipation path around the fuse to obscure a voltage contrast between blown and unblown fuses.
16. The system of claim 15 , wherein the stored values comprise an encryption key.
17. The system of claim 15 , wherein the resistors comprise unblown fuses having a higher resistance than the fuses when unblown and having a resistance less than an open circuit.
18. The system of claim 17 , wherein the resistors and the fuses comprise wires of different metals.
19. The system of claim 18 , wherein the resistors comprise a metal chosen from the group consisting of: platinum and tungsten.
20. The system of claim 15 , wherein the fuses comprise antifuses and wherein the resistors comprise unblown fuses having a higher resistance than blown antifuses and having a resistance less than an open circuit.