IP Library Granted Patent US 8,524,001
Granted Patent B2
US 8,524,001 · App. 12/653,651 · Granted Sep 3, 2013

Silicon wafer and method for producing the same

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Quick Facts
Patent No.
US 8,524,001
App. No.
12/653,651
Granted
Sep 3, 2013
Kind
B2
Abstract

Silicon wafers having excellent voltage resistance characteristics of an oxide film and high C-mode characteristics are derived from single crystal silicon ingots doped with nitrogen and hydrogen, characterized in that a plurality of voids constituting a bubble-like void aggregates are present ≧50% relative to total voids; a V 1 region having a void density of over 2×10 4 /cm 3 and below 1×10 5 /cm 3 is ≦20% of the total area of wafer; a V 2 region having a void density of 5×10 2 to 2×10 4 /cm 3 occupies ≧80% of the total area of the wafer; and bulk microdefect density is ≧5×10 8 /cm 3 .

Claims (12)

1. A silicon wafer doped with nitrogen and hydrogen, comprising:

a plurality of voids constituting bubble-like void aggregates which are present in an amount ≧ to 50% of total void number;

a V 1 region having a void density of over 2×10 4 /cm 3 and below 1×10 5 /cm 3 which occupies ≦ to 20% of the total area of the silicon wafer;

a V 2 region having a void density of 5×10 2 to 2×10 4 /cm 3 which occupies to 80% of the total area of the silicon wafer; and

a bulk micro defect density ≧5×10 8 /cm 3 .

2. A method for producing a silicon wafer of claim 1 , comprising obtaining a silicon wafer from a silicon crystal pulled by a method comprising:

setting a nitrogen concentration in the silicon crystal from 3×10 13 to 3×10 15 atoms/cm 3 ;

setting a pressure of the atmosphere inside a crystal pulling furnace from 40 to 250 mbar;

introducing hydrogen in an amount of 1 to 3.8% by volume into the atmosphere;

establishing a temperature gradient in a longitudinal direction of the silicon crystal over the range of 1100° to 1200° C. during pulling of the silicon crystal to ≧ to 3.5° C./mm; and

controlling an upper limit of pulling speed such that a V 1 region having a void density of over 2×10 4 /cm 3 and below 1×10 5 /cm 3 is ≦20% of the total area of the silicon wafer, and controlling a lower limit of pulling speed such that a V 2 region having a void density of 5×10 2 to 2×10 4 /cm 3 ≧80% of the total area of said silicon wafer.

3. The method of claim 2 , wherein the oxygen concentration in the silicon crystal is set to be ≦ to 7×10 17 atoms/cm 3 .

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE DATE OF THE CHANGE OF ADDRESS FROM 03/12/2020 TO 12/03/2020 PREVIOUSLY RECORDED AT REEL: 056719 FRAME: 0881. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 1, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 057561/0451 →
CHANGE OF ADDRESS Recorded Jun 30, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 056719/0881 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2009
From: NAKAI, KATSUHIKO; IKARI, ATSUSHI; OHKUBO, MASAMICHI
To: SILTRONIC AG
Reel/Frame 023726/0067 →