IP Library Granted Patent US 8,264,864
Granted Patent B2
US 8,264,864 · App. 12/653,835 · Granted Sep 11, 2012

Memory device with band gap control

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Quick Facts
Patent No.
US 8,264,864
App. No.
12/653,835
Granted
Sep 11, 2012
Kind
B2
Abstract

A memory device with band gap control is described. A memory cell can include a conductive oxide layer in contact with and electrically in series with an electronically insulating layer. A thickness of the electronically insulating layer is configured to increase from an initial thickness to a target thickness. The increased thickness of the electronically insulating layer can improve resistive memory effect, increase a magnitude of a read current during read operations, and lower barrier height with a concomitant reduction in band gap of the electronically insulating layer. The memory cell can include a memory element that comprises the conductive oxide layer and the electronically insulating layer and can optionally include a non-ohmic device (NOD). The memory cell can be positioned in a two-terminal cross-point array between a pair of conductive array lines across which voltages for data operations are applied. The memory cell and array can be fabricated BEOL.

Claims (17)

1. A non-volatile memory cell, comprising:

at least one layer of a conductive oxide material that includes mobile ions; and

an electronically insulating layer having a thickness that is approximately 50 Å or less, the electronically insulating layer is in contact with and is electrically in series with the at least one layer of the conductive oxide material, wherein a voltage for data operations applied across the electronically insulating layer and the at least one layer of the conductive oxide material is operative to generate a current, and

wherein the electronically insulating layer is permanently doped with a dopant material that comprises tin oxide and is operative to increase a magnitude of the current while the voltage is applied, and the dopant material comprises a different material than a material of the mobile ions and the electronically insulating layer.

2. The non-volatile memory cell of claim 1 , wherein the electronically insulating layer comprises an electrolytic tunnel barrier.

3. The non-volatile memory cell of claim 1 , wherein the electronically insulating layer comprises a material selected from the group consisting of zirconia, yttria-stabilized zirconia, hafnium oxide, gadolinium oxide, lanthanum aluminum oxide, yttrium oxide, and erbium oxide.

4. The non-volatile memory cell of claim 1 , wherein the at least one layer of the conductive oxide material comprises a perovskite.

5. The non-volatile memory cell of claim 4 , wherein the perovskite comprises at least one material selected from the group consisting of PCMO, LCMO, LSMO, PMO, LSCMO, STO, a reduced STO, SRO, LSCrO, LNO, LSCrO, LSCoO, LSFeO, and YBCO.

6. The non-volatile memory cell of claim 1 , wherein the thickness of the electronically insulating layer is in a range of approximately 20 Å to 30 Å.

7. The non-volatile memory cell of claim 1 , wherein a total thickness for the at least one layer of the conductive oxide material is in a range from about 100 Å to about 350 Å.

8. The non-volatile memory cell of claim 1 , wherein the mobile ions are oxygen ions.

9. The non-volatile memory cell of claim 1 , wherein the electronically insulating layer is permeable to the mobile ions.

10. The non-volatile memory cell of claim 9 , wherein the mobile ions are oxygen ions.

11. The non-volatile memory cell of claim 1 , wherein the electronically insulating layer and the at least one layer of the conductive oxide material are operative to store data as a plurality of conductivity profiles that can be non-destructive determined by applying a read voltage across the electronically insulating layer and the at least one layer of the conductive oxide material, the plurality of conductivity profiles are retained in the absence of power so that the data is non-volatile, and

wherein one of the plurality of conductivity profiles is a programmed conductivity profile generated by applying a programming voltage across the electronically insulating layer and the at least one layer of the conductive oxide material that is operative to transport at least a portion of the mobile ions from the at least one layer of the conductive oxide material and into the electronically insulating layer.

12. The non-volatile memory cell of claim 1 , wherein the electronically insulating layer and the at least one layer of the conductive oxide material are operative to store data as a plurality of conductivity profiles that can be non-destructive determined by applying a read voltage across the electronically insulating layer and the at least one layer of the conductive oxide material, the plurality of conductivity profiles are retained in the absence of power so that the data is non-volatile, and

wherein one of the plurality of conductivity profiles is an erased conductivity profile generated by applying an erase voltage across the electronically insulating layer and the at least one layer of the conductive oxide material that is operative to transport mobile ions from the electronically insulating layer and into the at least one layer of the conductive oxide material.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Feb 9, 2012
From: SILICON VALLEY BANK
To: UNITY SEMICONDUCTOR CORPORATION
Reel/Frame 027675/0686 →
SECURITY AGREEMENT Recorded Jan 25, 2011
From: UNITY SEMICONDUCTOR CORPORATION
To: SILICON VALLEY BANK
Reel/Frame 025710/0132 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2010
From: MEYER, RENE
To: UNITY SEMICONDUCTOR CORPORATION
Reel/Frame 023764/0388 →