Liquid crystal display device having particular structure for data line, source electrode, drain electrode and pixel electrode
A liquid crystal display device and a fabricating method having a simplified process are disclosed. The liquid crystal display device comprises, among other features, first and second substrates, a gate line crossing a data line with a gate insulating film therebetween to define a pixel area. A common line is provided on the substrate substantially parallel to the gate line, and a common electrode is extended from the common line into the pixel area. A pixel electrode is extended from a drain electrode into the pixel area to form a horizontal electric field with the common electrode. The data line, a source electrode, a drain electrode and the pixel electrode are formed of a first conductive layer group having at least double conductive layers, and are formed in an area to be sealed by a sealant upon joining the first and second substrates.
1. A liquid crystal display device, comprising:
first and second substrates;
a gate line on the first substrate;
a data line crossing the gate line with a gate insulating film therebetween to define a pixel area;
a thin film transistor including a gate electrode connected to the gate line, a source electrode connected to the data line, a drain electrode opposite the source electrode and a semiconductor pattern defining a channel between the source electrode and the drain electrode;
a common line on the first substrate substantially parallel to the gate line;
a common electrode extended from the common line into the pixel area; and
a pixel electrode extended from the drain electrode into the pixel area to form a horizontal electric field with the common electrode,
wherein the data line, the source electrode, the drain electrode and the pixel electrode are formed of a first conductive layer group having at least double conductive layers, and are formed in an area to be sealed by a sealant upon joining the first and second substrates.
2. The device as claimed in claim 1 , further comprising:
a storage capacitor provided such that the drain electrode overlaps a portion of the common electrode with the gate insulating film therebetween.
3. The device as claimed in claim 1 , further comprising:
a data link on the first substrate to be connected to the data line via a contact hole passing through the gate insulating film.
4. The device as claimed in claim 3 , wherein the contact hole is formed in an area to be sealed by the sealant.
5. The device as claimed in claim 3 , further comprising:
an alignment film on the data line, the source electrode, the drain electrode and the pixel electrode.
6. The device as claimed in claim 5 , wherein the contact hole is formed under the alignment film.
7. The device as claimed in claim 3 , further comprising:
a gate pad connected to the gate line;
a data pad connected to the data link; and
a common pad connected to the common line,
wherein each of the gate pad, the data pad and the common pad includes:
a lower pad electrode on the first substrate;
a contact hole passing through the gate insulating film to expose the lower pad electrode; and
an upper pad electrode connected to the lower pad electrode via the contact hole and formed of at least one conductive layer of the first conductive layer group.
8. The device as claimed in claim 7 , wherein the upper pad electrode of the data pad is integral to the at least one conductive layer of the data line.
9. The device as claimed in claim 1 , wherein at least one conductive layer of the conductive layer group includes one of a transparent conductive layer, Ti and W.
10. The device as claimed in claim 1 , wherein the semiconductor pattern is formed only at a position to be provided with the thin film transistor.
11. The device as claimed in claim 1 , wherein the gate line, the gate electrode, the common line and the common electrode are formed of a second conductive layer group having at least double conductive layers.
12. The device as claimed in claim 11 , wherein, a lowermost layer of the first conductive layer group includes a transparent conductive layer, and an uppermost layer of the second conductive layer group includes a metal having one of Mo and Mo-Alloy.
13. The device as claimed in claim 11 , wherein the second conductive group has step coverage having a stepwise shape.
14. The device as claimed in claim 1 , wherein the semiconductor pattern includes an active layer, and an ohmic contact layer connected between the source electrode and the active layer and between the drain electrode and the active layer, and
wherein the ohmic contact layer has portions on opposite sides of the channel, and an edge of the ohmic contact layer and edges of source electrode and the drain electrode have step coverage having a stepwise shape.