IP Library › Granted Patent US 8,339,819
Granted Patent B2
US 8,339,819 · App. 12/656,515 · Granted Dec 25, 2012

Booster circuit and display device

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,339,819
App. No.
12/656,515
Granted
Dec 25, 2012
Kind
B2
Abstract

A booster circuit has: a charge pump configured to perform a booster operation that boosts a voltage supplied from an external power source and outputs the boosted voltage as an output voltage through an output capacitor; and a feedback circuit section configured to control the booster operation depending on the output voltage. A mode of the booster operation includes: a charge mode that charges the output capacitor with the voltage supplied from the external power source; and a discharge mode that discharges the output capacitor. The mode of the booster operation is switched between the charge mode and the discharge mode depending on the output voltage. The feedback circuit section has a booster operation control section that secures a period during which the mode is not switched between the charge mode and the discharge mode in accordance with an external synchronizing signal.

Claims (33)

1. A booster circuit comprising:

a charge pump configured to perform a booster operation that boosts a voltage supplied from an external power source and outputs the boosted voltage as an output voltage through an output capacitor; and

a feedback circuit section configured to control said booster operation of said charge pump depending on said output voltage,

wherein a mode of said booster operation includes:

a charge mode that charges said output capacitor with the voltage supplied from said external power source; and

a discharge mode that discharges said output capacitor,

wherein said mode of said booster operation is switched between said charge mode and said discharge mode depending on said output voltage, and

wherein said feedback circuit section comprises a booster operation control section configured to secure a period during which said mode is not switched between said charge mode and said discharge mode in accordance with an external synchronizing signal.

2. The booster circuit according to claim 1 ,

wherein said booster operation control section comprises a voltage dividing circuit section configured to voltage-divide said output voltage with a voltage dividing ratio varying depending on said external synchronizing signal and to output the divided voltage as a feedback voltage, and

wherein said feedback circuit section further comprises:

a reference voltage source section configured to output a reference voltage; and

a comparison circuit section configured to make a comparison between said reference voltage and said feedback voltage and to output a comparison result signal indicating the result of said comparison for controlling said booster operation.

3. The booster circuit according to claim 1 ,

wherein said booster operation control section comprises a reference voltage source section configured to output a reference voltage varying depending on said external synchronizing signal, and

wherein said feedback circuit section further comprises:

a voltage dividing circuit section configured to voltage-divide said output voltage and to output the divided voltage as a feedback voltage; and

a comparison circuit section configured to make a comparison between said reference voltage and said feedback voltage and to output a comparison result signal indicating the result of said comparison for controlling said booster operation.

4. The booster circuit according to claim 1 ,

wherein said feedback circuit section further comprises:

a voltage dividing circuit section configured to voltage-divide said output voltage and to output the divided voltage as a feedback voltage;

a reference voltage source section configured to output a reference voltage; and

a comparison circuit section configured to make a comparison between said reference voltage and said feedback voltage and to output a comparison result signal indicating the result of said comparison for controlling said booster operation, and

wherein said comparison circuit section comprises:

a comparator configured to make the comparison between said reference voltage and said feedback voltage and to generate said comparison result signal; and

said booster operation control section that comprises a synchronizing circuit configured to output said comparison result signal after performing waveform modulation of said comparison result signal in accordance with said external synchronizing signal.

5. The booster circuit according to claim 4 ,

wherein said external synchronizing signal comprises:

a first external synchronizing signal for stating said booster operation of said charge pump; and

a second external synchronizing signal for stopping said booster operation of said charge pump, and

wherein said booster operation control section further comprises:

a first external control signal input section to which said first external synchronizing signal is supplied; and

a second external control signal input section to which said second external synchronizing signal is supplied.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2012
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 029357/0239 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2010
From: MIYAZAKI, KIYOSHI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024330/0985 →
Priority Claims (1)
JP 2009-024211 · Feb 4, 2009 · national
Continuity (1)
Related Publication 20100207929A1 · Aug 19, 2010