IP Library Granted Patent US 8,249,838
Granted Patent B2
US 8,249,838 · App. 12/657,262 · Granted Aug 21, 2012

Method and apparatus for modeling memristor devices

Assignee: The United States of America as represented by the Secretary of the Air Force
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Quick Facts
Patent No.
US 8,249,838
App. No.
12/657,262
Granted
Aug 21, 2012
Kind
B2
Abstract

A method and apparatus for modeling the characteristics of memristor devices. The invention provides methods and an apparatus for accurately characterizing the linear and non-linear Lissajous current-voltage behavior of actual memristor devices and incorporating such behavior into the resultant model. The invention produces a model that is adaptable to large scale memristor device simulations.

Claims (366)

1. A method for producing a model of a memristor device for facilitating integrated circuit modeling and simulation, comprising the steps of:

inputting a periodic signal into a memristor, said periodic signal having a minimum voltage amplitude, a maximum voltage amplitude, and a frequency;

measuring and recording said memristor's output current at a plurality of

discrete time intervals over at least one period of said periodic signal;

plotting said output current versus input voltage over said at least one time period of said periodic signal;

plotting said output current versus time over said at least one time period of said periodic signal;

determining a high resistance state R on of said memristor from the slope of a high resistance portion of said plotted output current versus said input voltage;

determining a low resistance state R off of said memristor from the slope of a low resistance portion of said plotted output current versus said input voltage;

determining, from said plotted output current versus said input voltage

a low threshold voltage T 1 at which said memristor transitions from a high resistance state to a low resistance state, and

a high threshold voltage T h at which said memristor transitions from a low resistance state to a high resistance state;

determining from said plot of output current versus time a value of a magnitude fitting parameter K h1 when said input voltage is positive;

determining from said plot of output current versus time a value of a curvature fitting parameter K h2 when said input voltage is positive;

determining from said plot of output current versus time a value of a magnitude fitting parameter K l1 when said input voltage is negative;

determining from said plot of output current versus time a value of a curvature fitting parameter K l2 when said input voltage is negative; and

WHEN input voltage V in is greater than said high threshold voltage T h ,

THEN generating a model of said memristor device according to the expression

R

mem

(

t

)

=

R

mem

(

t

-

Δ

t

)

-

Δ

tK

h

1

K

h

2

(

V

in

(

t

)

-

T

h

)

{

if

R

mem

(

t

)

<

R

on

else

R

mem

(

t

)

=

R

on

WHEN input voltage V in is less than said low threshold voltage T 1 ,

THEN generating a model of said memristor device according to the expression

R

mem

(

t

)

=

R

mem

(

t

-

Δ

t

)

-

Δ

tK

l

1

K

l

2

(

V

in

(

t

)

-

T

l

)

{

if

R

mem

(

t

)

>

R

off

else

R

mem

(

t

)

=

R

off

where

R mem (t) is the resistance of said memristor at time t;

R mem (t−Δt) is the resistance of said memristor at time t−Δt:

R on is the resistance of said memristor in its high resistance state;

R off is the resistance of the memristor in its low resistance state;

V in is the voltage input to the memristor;

T 1 is the low threshold voltage of said memristor;

T h is the high threshold voltage of said memristor:

K h1 is the magnitude fitting parameter when said input voltage is positive;

K h2 is the curvature fitting parameter when said input voltage is positive;

K l1 is the magnitude fitting parameter when said input voltage is negative;

K l2 is the curvature fitting parameter when said input voltage is negative; and

Δt is the minimum integral time step parameter between successive memristor resistance measurements.

2. The method of claim 1 , wherein said plurality of discrete time intervals comprises at least 1000 discrete time intervals.

3. The method of claim 1 wherein Δt is 0.001 times said frequency or said input signal.

4. An apparatus for producing a model of a memristor device for facilitating integrated circuit modeling and simulation, comprising;

a fixture for applying a voltage across a memristor;

voltage measuring and recording means;

a current measuring and recording means;

a time measuring and recording means;

a computer having an external data bus,

wherein said computer receives said voltage, current, and time recorded measurements over said external data bus;

a software program;

wherein said software program further comprises computer executable instructions which, when said instructions are executed by said computer, said instructions perform the steps of:

inputting a periodic signal into a memristor, said periodic signal having a minimum voltage amplitude, a maximum voltage amplitude, and a frequency;

measuring and recording said memristor's output current at a plurality of

discrete time intervals over at least one period of said periodic signal;

plotting said output current versus input voltage over said at least one time period of said periodic signal;

plotting said output current versus time over said at least one time period of said periodic signal;

determining a high resistance state R on of said memristor from the slope of a high resistance portion of said plotted output current versus said input voltage;

determining a low resistance state R off of said memristor from the slope of a low resistance portion of said plotted output current versus said input voltage;

determining, from said plotted output current versus said input voltage

a low threshold voltage T 1 at which said memristor transitions from a high resistance state to a low resistance state, and

a high threshold voltage T h at which said memristor transitions from a low resistance state to a high resistance state;

determining from said plot of output current versus time a value of a magnitude fitting parameter K h1 when said input voltage is positive;

determining from said plot of output current versus time a value of a curvature fitting parameter K h2 when said input voltage is positive;

determining from said plot of output current versus time a value of a magnitude fitting parameter K l1 when said input voltage is negative;

determining from said plot of output current versus time a value of a curvature fitting parameter K l2 when said input voltage is negative; and

WHEN input voltage V in is greater than said high threshold voltage T h ,

THEN generating a model of said memristor device according to the expression

R

mem

(

t

)

=

R

mem

(

t

-

Δ

t

)

-

Δ

tK

h

1

K

h

2

(

V

in

(

t

)

-

T

h

)

{

if

R

mem

(

t

)

<

R

on

else

R

mem

(

t

)

=

R

on

WHEN input voltage V in is less than said low threshold voltage T 1 ,

THEN generating a model of said memristor device according to the expression

R

mem

(

t

)

=

R

mem

(

t

-

Δ

t

)

-

Δ

tK

l

1

K

l

2

(

V

in

(

t

)

-

T

l

)

{

if

R

mem

(

t

)

>

R

off

else

R

mem

(

t

)

=

R

off

where

R mem (t) is the resistance of said memristor at time t;

R mem (t−Δt) is the resistance of said memristor at time t−Δt:

R on is the resistance of said memristor in its high resistance state;

R off is the resistance of the memristor in its low resistance state;

V in is the voltage input to the memristor;

T 1 is the low threshold voltage of said memristor;

T h is the high threshold voltage of said memristor:

K h1 is the magnitude fitting parameter when said input voltage is positive;

K h2 is the curvature fitting parameter when said input voltage is positive;

K l1 is the magnitude fitting parameter when said input voltage is negative;

K l2 is the curvature fitting parameter when said input voltage is negative; and

Δt is the minimum integral time step parameter between successive memristor resistance measurements.

5. The apparatus of claim 4 , wherein said plurality of discrete time intervals comprises at least 1000 discrete time intervals.

6. Apparatus of claim 4 , wherein said voltage, current, and time measuring and recording means comprise a semiconductor parameter analyzer.

7. Apparatus of claim 4 , wherein said fixture for applying a voltage across a memristor comprises a microprobe station.

8. Apparatus of claim 4 wherein Δt is 0.001 times said frequency of said input signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2012
From: PINO, ROBINSON E; BOHL, JAMES W
To: UNITED STATES AIR FORCE
Reel/Frame 028409/0279 →
Continuity (2)
Provisional Application 61284146 · Nov 17, 2009
Related Publication 20110119036A1 · May 19, 2011