Driver circuit
A driver circuit according to the present invention includes a grayscale circuit, an amplifier circuit, a comparison circuit, and a sampling timing adjusting circuit. The grayscale circuit generates a grayscale voltage from grayscale data. The amplifier circuit generates a video output from the grayscale voltage. The comparison circuit compares the grayscale voltage with the video output and outputs a comparison result. The sampling timing adjusting circuit adjusts a sampling timing signal for sampling the video signal based on the comparison result to generate an adjusted sampling timing signal.
1 . A driver circuit comprising:
a grayscale circuit generating a grayscale voltage from grayscale data;
an amplifier circuit generating a video output from the grayscale voltage;
a comparison circuit comparing the grayscale voltage with the video output and outputting a comparison result;
a sampling timing adjusting circuit adjusting a sampling timing signal for sampling the video signal based on the comparison result to generate an adjusted sampling timing signal.
2 . The driver circuit according to claim 1 , wherein the comparison circuit outputs the comparison result when the grayscale voltage becomes substantially equal to the video signal.
3 . The driver circuit according to claim 1 , wherein the sampling timing adjusting circuit changes the falling timing of the adjusted sampling timing signal based on the comparison result.
4 . The driver circuit according to claim 1 , further comprising an oscillation circuit generating a plurality of outputs having phases different from each other, wherein
a first output which is one of the plurality of outputs is used as a video timing signal for generating the video output from the grayscale voltage, and
a rising timing of a second output having a phase-lag relative to the first output is rising timing of the adjusted sampling timing signal.
5 . The driver circuit according to claim 1 , further comprising an oscillation circuit generating a plurality of outputs having phases different from each other, wherein
a first output which is one of the plurality of outputs is used as a video timing signal for generating the video output from the grayscale voltage,
a rising timing of a second output having a phase-lag relative to the first output is rising timing of the adjusted sampling timing signal, and
either a rising timing of the comparison result or a rising timing of a third output having a phase-lag relative to the second output which is raised at an earlier timing is a falling timing of the adjusted sampling timing signal.