IP Library Granted Patent US 8,274,032
Granted Patent B2
US 8,274,032 · App. 12/670,603 · Granted Sep 25, 2012

Separated unit pixel preventing sensitivity reduction and the driving method using the unit pixel

Assignee: Siliconfile Technologies Inc.
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Quick Facts
Patent No.
US 8,274,032
App. No.
12/670,603
Granted
Sep 25, 2012
Kind
B2
Abstract

Provided are a separation type unit pixel for preventing sensitivity reduction to prevent a depletion area from decreasing and a method of driving the unit pixel. The separation type unit pixel for preventing sensitivity reduction includes: a substrate; a photodiode constructed with a junction of a P-type diffusion area and an N-type diffusion area which are formed under a surface of the substrate in a vertical direction; a gate electrode conductor which is disposed on an upper portion of the surface of the substrate to be adjacent to the N-type or P-type diffusion area; a floating diffusion area formed to be adjacent to another surface of the gate electrode conductor; and a sensitivity reduction preventing conductor disposed on an upper portion of the photodiode area to cover the photodiode area.

Claims (26)

1. A separation type unit pixel for preventing sensitivity reduction comprising:

a substrate;

a photodiode constructed with a junction of a P-type diffusion area and an N-type diffusion area which are formed under a surface of the substrate in a vertical direction;

a gate electrode conductor which is disposed on an upper portion of the surface of the substrate to be adjacent to the N-type or P-type diffusion area;

a floating diffusion area formed to be adjacent to another surface of the gate electrode conductor; and

a sensitivity reduction preventing conductor disposed on an upper portion of the photodiode area to cover the photodiode area,

wherein light is incident from a lower portion of the substrate and an epitaxial substrate is disposed on an upper portion of the substrate.

2. The separation type unit pixel of claim 1 , wherein the sensitivity reduction preventing conductor further covers a portion of the gate electrode conductor.

3. The separation type unit pixel of claim 1 , wherein an insulating material is formed between the surface of the substrate and the gate electrode conductor and between the surface of the substrate and the sensitivity reduction preventing conductor.

4. The separation type unit pixel of claim 1 ,

wherein the gate electrode conductor is polycrystalline silicon, and

wherein the sensitivity reduction preventing conductor is metal or polycrystalline silicon.

5. The separation type unit pixel of claim 1 ,

wherein the substrate has a P-type,

wherein a spacer is formed at a side surface of the gate electrode conductor,

wherein the P-type diffusion area is formed on the surface of the P-type substrate, and

wherein the N-type diffusion area is formed under the P-type diffusion area to be wider than the P-type diffusion area by a thickness of the spacer.

6. A method of driving a separation type unit pixel,

wherein the separation type unit pixel comprises:

a substrate:

a photodiode constructed with a junction of a P-type diffusion area and an N-type diffusion area which are formed under a surface of the substrate in a vertical direction;

a gate electrode conductor which is disposed on an upper portion of the surface of the substrate to be adjacent to the N-type or P-type diffusion area;

a floating diffusion area formed to be adjacent to another surface of the gate electrode conductor; and

a sensitivity reduction preventing conductor disposed on an upper portion of the photodiode area to cover the photodiode area,

wherein the gate electrode conductor is applied with a transfer control signal, and the sensitivity reduction preventing conductor is applied with a sensitivity reduction preventing signal, and

wherein the sensitivity reduction preventing signal is enabled when the transfer control signal is in a disabled state, disabled after the transfer control signal is enabled and a predetermined delay time elapses, and enabled again after the transfer control signal is disabled and a predetermined delay time elapses, and wherein light is incident from a lower portion of the substrate and an epitaxial substrate is disposed on an upper portion of the substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2017
From: SILICONFILE TECHNOLOGIES INC.
To: SK HYNIX INC.
Reel/Frame 041023/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2010
From: LEE, DO YOUNG
To: SILICONFILE TECHNOLOGIES INC.
Reel/Frame 023842/0695 →
Priority Claims (1)
KR 10-2007-0080160 · Aug 9, 2007 · national
Continuity (1)
Related Publication 20100213348A1 · Aug 26, 2010