IP Library › Granted Patent US 8,110,436
Granted Patent B2
US 8,110,436 · App. 12/671,054 · Granted Feb 7, 2012

Method for manufacturing field-effect transistor

Assignee: Canon Kabushiki Kaisha
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Quick Facts
Patent No.
US 8,110,436
App. No.
12/671,054
Granted
Feb 7, 2012
Kind
B2
Abstract

A method for manufacturing a field-effect transistor is provided. The field-effect transistor includes on a substrate a source electrode, a drain electrode, an oxide semiconductor layer, an insulating layer and a gate electrode. The method includes, after forming the insulating layer on the oxide semiconductor layer, an annealing step of increasing the electrical conductivity of the oxide semiconductor layers by annealing in an atmosphere containing moisture. The steam pressure at the annealing step is higher than the saturated vapor pressure in the atmosphere at the annealing temperature.

Claims (46)

1. A method for manufacturing a field-effect transistor including at least a source electrode, a drain electrode, an oxide semiconductor layer, a steam permeable insulating layer, and a gate electrode all formed on a substrate, the method comprising:

after forming the steam permeable insulating layer on the oxide semiconductor layer, increasing electrical conductivity of the oxide semiconductor layer by annealing in an atmosphere containing moisture, wherein steam pressure during annealing is higher than saturated vapor pressure in the atmosphere at an annealing temperature.

2. A method for manufacturing a field-effect transistor according to claim 1 , wherein the insulating layer is at least one of a gate steam permeable insulating layer and a protective layer.

3. A method for manufacturing a field-effect transistor according to claim 1 , further comprising:

forming the source electrode and the drain electrode on the substrate;

forming the oxide semiconductor layer on the substrate with the source electrode and the drain electrode formed thereon;

forming the steam permeable insulating layer as a gate insulating layer on the oxide semiconductor layer;

forming the gate electrode on the gate steam permeable insulating layer; and

performing the annealing in the atmosphere containing the moisture.

4. A method for manufacturing a field-effect transistor according to claim 1 , further comprising:

forming the oxide semiconductor layer on the substrate;

forming the steam permeable insulating layer as a gate insulating layer on the oxide semiconductor layer;

forming the gate electrode on the gate steam permeable insulating layer; and

performing the annealing in the atmosphere containing the moisture.

5. A method for manufacturing a field-effect transistor according to claim 3 , wherein the gate electrode is made of a metal having low steam permeability.

6. A method for manufacturing a field-effect transistor according to claim 1 , further comprising:

forming the gate electrode on the substrate;

forming a gate insulating layer on the substrate with the gate electrode formed thereon;

forming the oxide semiconductor layer on the gate insulating layer;

forming the steam permeable insulating layer as a protective layer on the oxide semiconductor layer;

forming a contact hole in the steam permeable insulating layer; and

performing the annealing in the atmosphere containing the moisture,

wherein the steam permeable insulating layer comprises an oxide steam permeable insulating material and is in contact with the oxide semiconductor layer and a low steam permeability material layer is formed theron to partially cover the steam permeable insulating layer.

7. A method for manufacturing a field-effect transistor according to claim 6 , wherein

the source electrode and the drain electrode are formed before the annealing in an atmosphere containing moisture, and

a material of the source electrode and the drain electrode has steam permeability.

8. A method for manufacturing a field-effect transistor according to claim 1 , further comprising:

forming the gate electrode on the substrate;

forming a gate steam permeable insulating layer on the substrate with the gate electrode formed thereon;

forming the oxide semiconductor layer on the gate insulating layer;

forming the steam permeable insulating layer as a protective layer on the oxide semiconductor layer;

forming a channel cover on the steam permeable insulating layer; and

performing the annealing in the atmosphere containing the moisture.

9. A method for manufacturing a field-effect transistor according to claim 1 , further comprising:

forming the gate electrode on the substrate;

forming a gate insulating layer on the substrate with the gate electrode formed thereon;

forming the source electrode and the drain electrode on the gate insulating layer, the source electrode and the drain electrode being made of a transparent oxide conductor;

forming the oxide semiconductor layer on the gate electrode insulating layer with the source electrode and the drain electrode formed thereabove thereon;

forming the steam permeable insulating layer as a protective layer on the oxide semiconductor layer;

forming a channel cover on the protective steam permeable insulating layer; and

performing the annealing in the atmosphere containing the moisture.

10. A method for manufacturing a field-effect transistor according to claim 8 , wherein the channel cover is made of a material having low steam permeability.

11. A method for manufacturing a field-effect transistor according to claim 1 , wherein the moisture is water, heavy water, steam, or heavy water steam.

12. A method for manufacturing a field-effect transistor according to claim 1 , wherein the oxide semiconductor layer is made of an amorphous oxide material containing In, Ga, and Zn.

13. A method for manufacturing a field-effect transistor according to claim 1 , wherein the annealing in the atmosphere containing the moisture is carried out at 100° C. or higher and lower than 500° C.

14. A method for manufacturing a field-effect transistor according to claim 1 , wherein the steam permeable insulating layer formed on the oxide semiconductor layer is an oxide insulating layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2010
From: HAYASHI, RYO; YABUTA, HISATO; TATEISHI, YOSHINORI; KAJI, NOBUYUKI
To: CANON KABUSHIKI KAISHA
Reel/Frame 023987/0653 →
Priority Claims (2)
JP 2007-249231 · Sep 26, 2007 · national
JP 2008-223480 · Sep 1, 2008 · national
Continuity (1)
Related Publication 20100203673A1 · Aug 12, 2010