IP Library Granted Patent US 8,263,923
Granted Patent B2
US 8,263,923 · App. 12/679,141 · Granted Sep 11, 2012

4T-4S step and repeat unit pixel and image sensor including the unit pixel

Assignee: Siliconfile Technologies Inc.
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Quick Facts
Patent No.
US 8,263,923
App. No.
12/679,141
Granted
Sep 11, 2012
Kind
B2
Abstract

Disclosed are a 4T-4S step & repeat unit pixel used in an image sensor and an image sensor having the same. The 4T-4S step & repeat unit pixel has four diffusion area patterns for photodiodes and three diffusion area patterns for an image signal conversion circuit. An aperture ratio of the image sensor increases in maximum by using four photodiodes arranged in a diagonal direction from each other and three diffusion area patterns arranged between the photodiodes near their edges.

Claims (30)

1. A 4 transistors and 4 shared step and repeat unit pixel comprising:

a first photodiode diffusion area pattern;

a second photodiode diffusion area pattern provided in an upper right diagonal direction from the first photodiode diffusion area pattern;

a third photodiode diffusion area pattern provided above the second photodiode diffusion area pattern;

a fourth photodiode diffusion area pattern provided in an upper left diagonal direction from the third photodiode diffusion area pattern over the first photodiode diffusion area pattern;

a first diffusion area pattern provided between the second and third photodiode diffusion area patterns;

a second diffusion area pattern provided between the second and third photodiode diffusion area pattern beside the first diffusion area pattern; and

a third diffusion area pattern provided in a diagonal direction from the fourth photodiode diffusion area pattern over the third photodiode diffusion area pattern.

2. The 4 transistors and 4 shared step and repeat unit pixel according to claim 1 ,

wherein most adjacent corners of the first and second photodiode diffusion area patterns are connected to each other by extension, and

wherein most adjacent corners of the third and fourth photodiode diffusion area patterns are connected to each other by extension.

3. The 4 transistors and 4 shared step and repeat unit pixel according to claim 2 ,

wherein a first transmission transistor is provided near the corner of the first photodiode diffusion area pattern and a second transmission transistor is provided near the corner of the second photodiode diffusion area pattern in a common diffusion area pattern connecting the first and second photodiode diffusion area patterns to each other by extension,

wherein a third transmission transistor is provided near the corner of the third photodiode diffusion area pattern and a fourth transmission transistor is provided near the corner of the fourth photodiode diffusion area pattern in a common diffusion area pattern connecting the third and fourth photodiode diffusion area patterns to each other by extension, and

wherein first, second, third, and fourth transmission control signals are applied to gates of the first, second, third, and fourth transmission transistors.

4. The 4 transistors and 4 shared step and repeat unit pixel according to claim 3 ,

wherein the first transmission control signal enables a transmission transistor located on an nth horizontal line and an nth vertical line,

wherein the second transmission control signal enables a transmission transistor located on an (n+1)th horizontal line and an (n+1) vertical line,

wherein the third transmission control signal enables a transmission transistor located on an (n+2)th horizontal line and an (n+1)th vertical line, and

wherein the fourth transmission control signal enables a transmission transistor located on an (n+3)th horizontal line and an nth vertical line, wherein n denotes any integer number.

5. The 4 transistors and 4 shared step and repeat unit pixel according to claim 1 ,

wherein a reset transistor is implemented in the first diffusion area pattern, a conversion transistor is implemented in the second diffusion area pattern, and a reset transistor is implemented in the third diffusion area pattern, and

wherein a select control signal is applied to a gate of the reset transistor, and a selection signal is applied to a gate of the selection transistor.

6. An image sensor comprising a plurality of 4 transistors and 4 shared step and repeat unit pixels arranged in horizontal and vertical directions, each of unit pixels having:

a first photodiode diffusion area pattern;

a second photodiode diffusion area pattern provided in an upper right diagonal direction from the first photodiode diffusion area pattern;

a third photodiode diffusion area pattern provided above the second photodiode diffusion area pattern; and

a fourth photodiode diffusion area pattern provided in an upper left diagonal direction from the third photodiode diffusion area pattern over the first photodiode diffusion area pattern,

wherein a green color filter is provided on top of the first and second photodiode diffusion area patterns, a red color filter is provided on top of the third photodiode diffusion area pattern, and a blue color filter is provided on top of the fourth photodiode diffusion area pattern in one of the 4 transistors and 4 shared step and repeat unit pixels, and

wherein a red color filter is provided on top of the first photodiode diffusion area pattern, a blue color filter is provided on top of the second photodiode diffusion area pattern, and a green color filter is provided on top of the third and fourth photodiode diffusion area patterns in another neighboring 4 transistors and 4 shared step and repeat unit pixel.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2017
From: SILICONFILE TECHNOLOGIES INC.
To: SK HYNIX INC.
Reel/Frame 041023/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2010
From: LEE, DO YOUNG
To: SILICONFILE TECHNOLOGIES INC.
Reel/Frame 024108/0767 →
Priority Claims (1)
KR 10-2007-0103301 · Oct 15, 2007 · national
Continuity (1)
Related Publication 20100252718A1 · Oct 7, 2010