Test apparatus and circuit apparatus

1. A test apparatus for testing a device under test, comprising:

a plurality of operational units that operate in response to control data supplied thereto to test the device under test;

a control section that generates packet data containing the control data and unit selection data indicating which one or more of the plurality of operational units are to be selected; and

a plurality of data transfer units that are cascade-connected to each other so that the packet data is transferred from each of the plurality of data transfer units to a data transfer unit of a following stage, each of the plurality of data transfer units corresponding to one or more of the plurality of operational units, wherein

when each of the plurality of data transfer units receives the packet data whose unit selection data indicates that one or more of the operational units corresponding thereto are to be selected, the data transfer unit inputs the control data contained in the packet data into the selected operational units or reads data from the selected operational units, and

the unit selection data has a plurality of bits in a one-to-one correspondence with the plurality of operational units, and each of the plurality of data transfer units refers to logic values of the plurality of bits to determine whether one or more of the operational units that are connected to the data transfer unit are to be selected.

2. The test apparatus as set forth in claim 1 , wherein

each of the plurality of data transfer units adds identification data to the packet data and transfers the resulting packet data to a data transfer unit of a following stage, and the identification data identifies which one or more of the plurality of bits of the unit selection data corresponds to one or more operational units connected to the data transfer unit of the following stage.

3. The test apparatus as set forth in claim 2 , wherein

the control section determines the logic values of the plurality of bits of the unit selection data that are in a one-to-one correspondence with the plurality of operational units depending on a stage number of a data transfer unit to which each to-be-selected operational unit is connected, and

each of the plurality of data transfer units changes a value (ID) of the identification data by a predetermined value when the data transfer unit transfers the packet data to the data transfer unit of the following stage.

4. The test apparatus as set forth in claim 3 , wherein

the control section informs each of the plurality of data transfer units of a location, in the packet data, of a field representing the unit selection data.

5. The test apparatus as set forth in claim 4 , wherein

each of the plurality of data transfer units reads one or more bits, from the plurality of bits of the unit selection data, that correspond to the operational units connected thereto, by referring to the value of the identification data, the number of operational units connected to each of the plurality of data transfer units, and the location of the field representing the unit selection data in the packet data.

6. The test apparatus as set forth in claim 4 , wherein

the control section judges whether the plurality of data transfer units correctly operate by comparing packet data input into a data transfer unit of an initial stage with packet data output from a data transfer unit of a last stage.

7. The test apparatus as set forth in claim 4 , wherein

the control section judges whether the plurality of data transfer units correctly operate by comparing (i) a portion, excluding identification data, of packet data input into a data transfer unit of an initial stage with (ii) a portion, excluding identification data, of packet data output from a data transfer unit of a last stage.

8. The test apparatus as set forth in claim 2 , wherein

the packet data contains writing selection data indicating that the control data is to be input into the selected operational units or reading selection data indicating that data is to be read from the selected operational units.

9. The test apparatus as set forth in claim 8 , wherein

when data is to be read from the selected operational units, the control section generates packet data containing dummy data in accordance with the number of bits of the data to be read from the selected operational units.

10. The test apparatus as set forth in claim 9 , wherein the control section:

when data is to be input into the selected operational units, generates unit selection data designating one or more of the plurality of operational units; and

when data is read from the selected operational units, generates unit selection data designating one of the plurality of operational units.

11. The test apparatus as set forth in claim 9 , wherein

when each of the plurality of data transfer units receives the packet data including the reading selection data and the unit selection data of the received packet data selects one or more of the operational units connected to the data transfer unit, the data transfer unit transfers the packet data whose dummy data is replaced with data read from the selected operational units to a data transfer unit of a following stage.

12. The test apparatus as set forth in claim 1 , wherein

each of the plurality of data transfer units transfers a clock signal to detect the packet data to a data transfer unit of a following stage.

13. The test apparatus as set forth in claim 12 , wherein

the control section stops inputting the clock signal into a data transfer unit of an initial stage when a predetermined number of cycles (of the clock signal) has elapsed after completing inputting the packet data into the data transfer unit of the initial stage.

14. The test apparatus as set forth in claim 13 , wherein

each of the plurality of data transfer units further transfers the clock signal received from a previous stage to the operational units connected thereto as an operational clock, and

the control section inputs the clock signal into the data transfer unit of the initial stage, after completing inputting the packet data, until a necessary number of cycles elapses for causing one or more operational units selected by the unit selection data of the packet data to operate.

15. The test apparatus as set forth in claim 12 , wherein

before starting inputting the packet data into a data transfer unit of an initial stage, the control section inputs into the data transfer unit of the initial stage a predetermined number of cycles of the clock signal.

16. A circuit apparatus comprising:

a plurality of operational units that operate in response to control data supplied thereto;

a control section that generates packet data containing the control data and unit selection data indicating which one or more of the plurality of operational units are to be selected; and

a plurality of data transfer units that are cascade-connected to each other so that the packet data is transferred from each of the plurality of data transfer units to a data transfer unit of a following stage, each of the plurality of data transfer units corresponding to one or more of the plurality of operational units, wherein

when each of the plurality of data transfer units receives the packet data whose unit selection data indicates that one or more of the operational units corresponding thereto are to be selected, the data transfer unit inputs the control data contained in the packet data into the selected operational units or reads data from the selected operational units, and

the unit selection data has a plurality of bits in a one-to-one correspondence with the plurality of operational units, and each of the plurality of data transfer units refers to logic values of the plurality of bits to determine whether one or more of the operational units that are connected to the data transfer unit are to be selected.