Semiconductor device and method of manufacturing the same
View Patent ↗In a structure of a semiconductor device, a Si chip and a metal leadframe are jointed by metallic bond via a porous joint layer made of high conductive metal, having a three-dimensional network structure and using Ag as a bonding material, and a film containing Zn oxide or Al oxide is formed on a surface of a semiconductor assembly contacting to a polymer resin. In this manner, by the joint with the joint layer having the porous structure mainly made of Ag, thermal stress load of the Si chip can be reduced, and fatigue life of the joint layer itself can be improved. Besides, since adhesion of the polymer resin to the film can be enhanced by the anchor effect, occurrence of cracks in a bonding portion can be prevented, so that a highly-reliable Pb-free semiconductor device can be provided.
1. A semiconductor device comprising:
a metal leadframe having an external-extraction metal lead and a bonding portion;
a semiconductor chip die-bonded onto the bonding portion;
a joint member electrically connecting an electrode formed on a main surface of the semiconductor chip and the external-extraction metal lead;
a rear-surface electrode formed on a rear surface of the semiconductor chip; and
insulating molding compounds formed so as to cover the semiconductor chip and a periphery of the semiconductor chip, wherein
the semiconductor chip and the metal leadframe are jointed to each other via a porous joint layer in which conductive particles containing Ag as a bonding material are bonded to themselves,
a volume ratio of a metal portion of the joint layer is 30 to 80%,
a metal oxide film having a thickness of 1 to 600 nm is formed on surfaces of metals inside the joint layer, and
a thermoset resin is filled in at least a part of void portions between the conductive particles.
2. The semiconductor device according to claim 1 , wherein
the semiconductor chip is an IGET or a power MOSFET.
3. The semiconductor device according to claim 1 , wherein
the conductive particles forming the joint layer are formed by plating Ag on surfaces of particles mainly made of Cu.
4. The semiconductor device according to claim 1 , wherein
a thickness of the joint layer is 20 to 200 μm.
5. The semiconductor device according to claim 1 , wherein
the electrode on the main surface of the semiconductor chip and the joint member or the joint member and the external-extraction metal lead are jointed by an Ag paste made of Ag particles and a thermoset resin.
6. The semiconductor device according to claim 2 , wherein,
between the rear-surface electrode of the semiconductor chip and the metal leadframe, between the electrode on the main surface of the semiconductor chip and the joint member, or between the joint member and the external-extraction metal lead, the conductive particles themselves and the conductive particles and the respective members are bonded by metallic bond with using Ag as a bonding material, and a metal framework of the joint layer has a three-dimensional network structure.
7. The semiconductor device according to claim 1 , wherein
the metal oxide film is mainly made of Zn oxide or Al oxide.
8. The semiconductor device according to claim 1 , wherein
the joint member is a bonding wire.
9. The semiconductor device according to claim 1 , wherein
the joint member is a metal plate.
10. The semiconductor device according to claim 1 , wherein
the joint member is an Ag paste made of Ag particles and a thermoset resin, and
the electrode on the main surface of the semiconductor chip and the external-extraction metal lead are directly jointed to each other via the Ag paste.