Semiconductor device with reduced pad pitch
View Patent ↗A semiconductor device includes a first pad, a second pad and a third pad. The first pad and the third pad are electrically connected to each other. The first pad and the second pad are used for bonding. The second pad and the third pad are used for probing. According to this structure, Small size semiconductor device having high reliability even after a probing test can be provided.
1. A semiconductor device comprising:
a first pad arranged on a semiconductor chip and designed to be used for bonding;
a second pad arranged on the semiconductor chip and designed to be used for both bonding and probing: and
a third pad arranged on the semiconductor chip and electrically connected to the first pad and designed to be used for probing,
wherein the second pad is arranged to a longer direction of the second pad being directed to be parallel to a moving direction of a probe in probing the second pad, and the third pad is arranged to a longer direction of the third pad being directed to be parallel to a moving direction of the probe in probing the third pad.
2. The semiconductor device according to claim 1 , further comprising:
a fourth pad arranged on the semiconductor chip designed to be used for bonding;
a fifth pad arranged on the semiconductor chip designed to be used for both bonding and probing; and
a sixth pad arranged on the semiconductor chip designed to be used for probing,
wherein the first pad, the second pad and the third pad are arranged in a first side of the semiconductor chip, the fourth pad, the fifth pad, and the sixth pad are arranged in a second side which is directed in a different direction from the first side, and each of a longer direction of each of the second pad, the third pad, fifth pad, and sixth pad is a direction same to each other which is parallel to the moving direction of the probe in probing.
3. The semiconductor device according to claim 1 , wherein the second pad and the third pad are arranged on an outer side of the semiconductor device than the first pad.
4. The semiconductor device according to claim 2 , wherein the fifth pad and the sixth pad are arranged on an outer side of the semiconductor device than the fourth pad.
5. A semiconductor device, comprising:
a bonding pad arranged on a semiconductor chip;
a bonding/probing pad arranged on the semiconductor chip; and
a probing pad arranged on the semiconductor chip and electrically connected to the bonding pad,
wherein a longest side of the bonding/probing pad extends along a direction parallel to a moving direction of a probe in probing the second pad, and
a longest side of the probing pad extends along a direction parallel to a moving direction of the probe in probing the probing pad.
6. The semiconductor device according to claim 5 , further comprising an input/output buffer in said semiconductor chip, wherein said bonding pad is arranged over the input/output buffer, and said bonding/probing pad and said probing pad are arranged to not overlap the input/output buffer.
7. The semiconductor device according to claim 1 , further comprising an input/output buffer in said semiconductor chip, wherein said first pad is arranged over the input/output buffer and said second and third pads are arranged to not overlap the input/output buffer.