Illuminated pushbutton switch with electronic latching and blinking feature

1. A circuit for latching an illuminating pushbutton switch comprising:

inputs receiving set, reset and toggle control signals;

outputs delivering open, closed and blink control signals;

latch logic controlled by the set and reset control signals, a first output of the latch logic delivering a first signal selected to maintain the illuminated pushbutton switch in an open state to the open control signal output and a second output of the latch logic delivering a second signal selected to maintain the illuminated pushbutton switch in a closed state to the closed control signal output; and

a frequency divider and oscillator coupled together to deliver, based upon the set and reset control signals, a signal to the blink control signal output that alternates at a selected frequency between a signal selected to maintain the illuminated pushbutton switch in the open state and the signal selected to maintain the illuminated pushbutton switch in the closed state,

wherein the circuit fits within a housing for the illuminated pushbutton switch within a space sized to hold two snap action switching devices, and the inputs and outputs are coupled to external pins from the illuminated pushbutton switch.

2. The circuit of claim 1 , wherein the latch logic further comprises:

a first latch set by the set control signal and cleared by the reset control signal, the first signal from the latch logic based upon a non-inverting output of the first latch and the second signal from the latch logic based upon an inverting output of the first latch.

3. The circuit of claim 2 , wherein the frequency divider further comprises:

a second latch having an input connected to an inverting output of the second latch, the frequency divider disabled based on the outputs of the first latch.

4. The circuit of claim 1 , wherein delivery of the signal from the frequency divider to the blink control signal output is gated based on the reset control signal.

5. The circuit of claim 1 , further comprising:

an inverter coupling the toggle control signal to a clock input of the first latch, wherein a trailing edge of a pulse in the toggle control signal changes the outputs of the first latch between set and reset states.

6. The circuit of claim 1 , further comprising:

filters coupled to each of the inputs to filter transient signals;

voltage level shift devices coupled to each of the inputs to shift a power supply voltage to a logic level voltage.

7. The circuit of claim 1 , further comprising:

protection devices coupled to each of the outputs to protect the circuit from transient signals and overload conditions.

8. A method of latching an illuminating pushbutton switch using a circuit having inputs receiving set, reset and toggle control signals at input and outputs delivering open, closed and blink control signals, the method comprising:

controlling latch logic with the set and reset control signals, a first output of the latch logic delivering a first signal selected to maintain the illuminated pushbutton switch in an open state to the open control signal output and a second output of the latch logic delivering a second signal selected to maintain the illuminated pushbutton switch in a closed state to the closed control signal output; and

based upon the set and reset control signals, controlling a frequency divider and oscillator coupled together to deliver a signal to the blink control signal output that alternates at a selected frequency between a signal selected to maintain the illuminated pushbutton switch in the open state and the signal selected to maintain the illuminated pushbutton switch in the closed state,

wherein the circuit fits within a housing for the illuminated pushbutton switch within a space sized to hold two snap action switching devices, and the inputs and outputs are coupled to external pins from the illuminated pushbutton switch.

9. The method of claim 8 , further comprising:

setting a first latch within the latch logic by the set control signal and clearing the latch by the reset control signal, the first signal from the latch logic based upon a non-inverting output of the first latch and the second signal from the latch logic based upon an inverting output of the first latch.

10. The method of claim 9 , wherein the frequency divider includes a second latch having an input connected to an inverting output of the second latch, the method further comprising:

disabling the frequency divider based on the outputs of the first latch.

11. The method of claim 8 , further comprising:

gating delivery of the signal from the frequency divider to the blink control signal output based on the reset control signal.

12. The method of claim 8 , further comprising:

coupling the toggle control signal to a clock input of the first latch, wherein an edge of a pulse in the toggle control signal changes the outputs of the first latch between set and reset states.

13. The method of claim 8 , further comprising:

filtering transient signals at each of the inputs;

shifting a power supply voltage to a logic level at each of the inputs.

14. The method of claim 8 , further comprising:

protecting the circuit from transient signals and overload conditions at each of the outputs.