IP Library Granted Patent US 8,040,173
Granted Patent B2
US 8,040,173 · App. 12/704,803 · Granted Oct 18, 2011

Reference signal generator circuit with filter-less quadrature mixers for wide-band applications

Assignee: Semiconductor Technology Academic Research Center
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Quick Facts
Patent No.
US 8,040,173
App. No.
12/704,803
Granted
Oct 18, 2011
Kind
B2
Abstract

A first mixer circuit mixes a first center frequency signal with a first local oscillation signal to generate a second mixed signal, and mixes the first center frequency signal with a second local oscillation signal to generate a first mixed signal, and a second mixer circuit mixes a second center frequency signal with the first local oscillation signal to generate a fourth mixed signal, and mixes the second center frequency signal with the second local oscillation signal to generate a third mixed signal. An adder and subtracter circuit subtracts the third mixed signal from the second mixed signal to output a signal of subtraction result as a first upper side band signal, and adds the first mixed signal to the fourth mixed signal to output a signal of addition result as a second upper side band signal different in phase from the first upper side band signal by 90 degrees.

Claims (18)

1. A reference signal generator circuit comprising:

a first signal generator circuit for generating a first center frequency signal having a center frequency;

a first phase shifter for shifting a phase of the first center frequency signal by 90 degrees to generate a second center frequency signal;

a second signal generator circuit for generating a first local oscillation signal having a shift frequency;

a second phase shifter for shifting a phase of the first local oscillation signal by 90 degrees to generate a second local oscillation signal;

a first mixer circuit for mixing the first center frequency signal with the first local oscillation signal to generate a second mixed signal, and for mixing the first center frequency signal with the second local oscillation signal to generate a first mixed signal;

a second mixer circuit for mixing the second center frequency signal with the first local oscillation signal to generate a fourth mixed signal, and for mixing the second center frequency signal with the second local oscillation signal to generate a third mixed signal;

an adder and subtracter circuit for adding or subtracting mixed signals from among the first mixed signal, the second mixed signal, the third mixed signal, and the fourth mixed signal; and

a switch circuit for switching an output between (i) an output of the adder and subtracter circuit and (ii) the first and second center frequency signals,

wherein, in a first case, (i) the adder and subtracter circuit (a) subtracts the third mixed signal from the second mixed signal to output a signal of a subtraction result as a first upper side band signal, and (b) adds the first mixed signal to the fourth mixed signal to output a signal of an addition result as a second upper side band signal which is different in phase from the first upper side band signal by 90 degrees, and (ii) the switch circuit outputs the first upper side band signal and the second upper side band signal,

wherein, in a second case, (i) the adder and subtracter circuit (c) adds the second mixed signal to the third mixed signal to output a signal of an addition result as a first lower side band signal, and (d) subtracts the fourth mixed signal from the first mixed signal to output a signal of a subtraction result as a second lower side band signal which is different in phase from the first lower side band signal by 90 degrees, and (ii) the switch circuit outputs the first lower side band signal and the second lower side band signal, and

wherein, in a third case, the switch circuit outputs the first and second center frequency signals.

2. The reference signal generator circuit as claimed in claim 1 ,

wherein the first mixer circuit and the second mixer circuit are combined as a quadrature mixer with a shared trans-conductance stage.

3. The reference signal generator circuit as claimed in claim 1 ,

wherein the reference signal generator circuit is configured with one of a differential circuit and a CMOS differential circuit.

4. The reference signal generator circuit as claimed in claim 2 ,

wherein the reference signal generator circuit is configured with one of a differential circuit and a CMOS differential circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2010
From: IKEBE, MASAYUKI; SANO, EIICHI; KOUTANI, MASATO
To: SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER
Reel/Frame 023932/0791 →
Priority Claims (1)
JP 2009-055045 · Mar 9, 2009 · national
Continuity (1)
Related Publication 20100225375A1 · Sep 9, 2010