IP Library Granted Patent US 7,986,026
Granted Patent B2
US 7,986,026 · App. 12/707,121 · Granted Jul 26, 2011

Semiconductor device including metal-insulator-metal capacitor arrangement

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Quick Facts
Patent No.
US 7,986,026
App. No.
12/707,121
Granted
Jul 26, 2011
Kind
B2
Abstract

A semiconductor device has a semiconductor substrate, a multi-layered wiring construction formed over the semiconductor device, and a metal-insulator-metal (MIM) capacitor arrangement established in the multi-layered wiring construction. The MIM capacitor arrangement includes first, second, third, fourth, fifth, and sixth electrode structures, which are arranged in order in parallel with each other at regular intervals. The first, second, fifth and sixth electrode structures are electrically connected to each other so as to define a first capacitor, and the third and fourth electrode structures are electrically connected to each other so as to define a second capacitor.

Claims (13)

1. A semiconductor device comprising:

a semiconductor substrate;

a multi-layered wiring construction formed over said semiconductor substrate; and

a metal-insulator-metal capacitor arrangement established in said multi-layered wiring construction,

wherein said metal-insulator-metal capacitor arrangement includes first and second pairs of meandering electrode structures, said first and second pairs of meandering electrode structures being arranged in order so as to maintain a parallel relationship with respect to each other, and being spaced from each other at regular intervals,

said first pair of meandering electrode structures are connected to respective first and second conductive lines having first and second nodes, and

said second pair of meandering electrode structures are connected to respective third and fourth conductive lines having third and fourth nodes, voltages being independently applied to said first, second, third and fourth nodes.

2. The semiconductor device as set forth in claim 1 , wherein each of said meandering electrode structures includes at least one meandering metal layer which is formed in an insulating interlayer included in said multi-layered wiring construction.

3. The semiconductor device as set forth in claim 1 , wherein each of said meandering electrode structures includes at least two meandering metal layers, which are formed in respective insulating interlayers included in said multi-layered wiring construction, and which are electrically connected to each other.

4. The semiconductor device as set forth in claim 1 , wherein the meandering electrode structure of said first pair of meandering electrode structures which is connected to said second conductive line, is adjacent to the meandering electrode structure of said second pair of meandering electrode structures which is connected to said third conductive line, and

the semiconductor device is configured for a high voltage and a low voltage being applied to said respective first and second nodes, and a low voltage and a high voltage being applied to said respective third and fourth nodes.

5. The semiconductor device as set forth in claim 1 , wherein the meandering electrode structure of said first pair of meandering electrode structures which is connected to said second conductive line, is adjacent to the meandering electrode structure of said second pair of meandering electrode structures which is connected to said third conductive line, and

the semiconductor device is configured for a low voltage and a high voltage being applied to said respective first and second nodes, and a high voltage and a low voltage being applied to said respective third and fourth nodes.

Assignments (2)
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025194/0905 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2010
From: FURUMIYA, MASAYUKI; KIKUTA, KUNIKO; YAMAMOTO, RYOTA; NAKAYAMA, MAKOTO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024101/0068 →