IP Library Granted Patent US 9,047,815
Granted Patent B2
US 9,047,815 · App. 12/708,057 · Granted Jun 2, 2015

Method for driving semiconductor device

Inventor: Hajime Kimura (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G09G3/3233G09G2300/0819G09G2300/0842G09G2300/0861G09G2310/0251G09G2310/0262G09G2320/043
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Quick Facts
Patent No.
US 9,047,815
App. No.
12/708,057
Granted
Jun 2, 2015
Kind
B2
Abstract

To provide a method for driving a semiconductor device, by which influence of variation in threshold voltage and mobility of transistors can be reduced. The semiconductor device includes an n-channel transistor, a switch for controlling electrical connection between a gate and a first terminal of the transistor, a capacitor electrically connected between the gate and a second terminal of the transistor, and a display element. The method has a first period for holding the sum of a voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor; a second period for turning on the switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor; and a third period for supplying a current to the display element through the transistor after the second period.

Claims (54)

1. A method for driving a semiconductor device, the semiconductor device comprising:

a transistor with n-type conductivity;

a wiring;

a first switch configured to control a conduction state between a gate of the transistor and a first terminal of the transistor;

a second switch configured to control a conduction state between the first terminal of the transistor and the wiring;

a capacitor electrically connected between the gate of the transistor and a second terminal of the transistor; and

a display element,

wherein the method for driving the semiconductor device includes:

in a first period, holding a sum of a voltage corresponding to a threshold voltage of the transistor and an image signal voltage in the capacitor,

in a second period, turning on the first switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor, and turning off the second switch so that the first terminal of the transistor and the wiring are in a non-conduction state with each other, and

in a third period, turning on the second switch and supplying a current from the wiring to the display element through the second switch and the transistor after the second period.

2. The method according to claim 1 , wherein the transistor includes an oxide semiconductor.

3. The method according to claim 2 , wherein the oxide semiconductor comprises one material selected from the group consisting of ZnO, a-InGaZnO, SiGe, GaAs, IZO, ITO, SnO, TiO, and AlZnSnO.

4. The method according to claim 1 ,

wherein the semiconductor device further comprises a third switch configured to control a conduction state between the second terminal of the transistor and the display element,

wherein the third switch is turned off so as to prevent a current from being supplied to the display element in the second period, and

wherein the third switch is turned on in the third period.

5. A method for driving a semiconductor device, the semiconductor device comprising:

a transistor with n-type conductivity;

a wiring;

a first switch configured to control a conduction state between a gate of the transistor and a first terminal of the transistor;

a second switch configured to control a conduction state between the first terminal of the transistor and the wiring;

a capacitor electrically connected between the gate of the transistor and a second terminal of the transistor; and

a display element,

wherein the method for driving the semiconductor device includes:

in a first period, holding a voltage corresponding to a threshold voltage of the transistor in the capacitor,

in a second period, holding a sum of the voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor,

in a third period, turning on the first switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor, and turning off the second switch so that the first terminal of the transistor and the wiring are in a non-conduction state with each other, and

in a fourth period, turning on the second switch and supplying a current from the wiring to the display element through the second switch and the transistor after the third period.

6. The method according to claim 5 ,

wherein the semiconductor device further comprises a third switch configured to control a conduction state between the second terminal of the transistor and the display element,

wherein the third switch is turned off so as to prevent a current from being supplied to the display element in the third period, and

wherein the third switch is turned on in the fourth period.

7. The method according to claim 5 , wherein the transistor includes an oxide semiconductor.

8. The method according to claim 7 , wherein the oxide semiconductor comprises one material selected from the group consisting of ZnO, a-InGaZnO, SiGe, GaAs, IZO, ITO, SnO, TiO, and AlZnSnO.

9. The method according to claim 7 , wherein the oxide semiconductor comprises one material selected from the group consisting of ZnO, a-InGaZnO, SiGe, GaAs, IZO, ITO, SnO, TiO, and AlZnSnO.

10. A method for driving a semiconductor device, the semiconductor device comprising:

a transistor with n-type conductivity;

a wiring;

a first switch configured to control a conduction state between a gate of the transistor and a first terminal of the transistor;

a second switch configured to control a conduction state between the first terminal of the transistor and the wiring;

a capacitor electrically connected between the gate of the transistor and a second terminal of the transistor; and

a display element,

wherein the method for driving the semiconductor device includes:

in a first period, initializing a voltage held in the capacitor,

in a second period, holding a voltage corresponding to a threshold voltage of the transistor in the capacitor,

in a third period, holding a sum of the voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor,

in a fourth period, turning on the first switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor, and turning off the second switch so that the first terminal of the transistor and the wiring are in a non-conduction state with each other, and

in a fifth period, turning on the second switch and supplying a current from the wiring to the display element through the second switch and the transistor after the fourth period.

11. The method according to claim 10 , wherein the transistor includes an oxide semiconductor.

12. The method according to claim 10 ,

wherein the semiconductor device further comprises a third switch configured to control a conduction state between the second terminal of the transistor and the display element,

wherein the third switch is turned off so as to prevent a current from being supplied to the display element in the fourth period, and

wherein the third switch is turned on in the fifth period.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ORIGINAL ASSIGNMENT WAS ASSIGNED TO AN INCORRECT SERIAL NUMBER (12708257). CORRECT SERIAL NUMBER IS 12708057. PREVIOUSLY RECORDED ON REEL 023959 FRAME 0503. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 6, 2013
From: KIMURA, HAJIME
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 029761/0967 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ORIGINAL ASSIGNMENT WAS ASSIGNED TO AN INCORRECT SERIAL NUMBER (12708257). CORRECT SERIAL NUMBER IS 12708057. PREVIOUSLY RECORDED ON REEL 024336 FRAME 0539. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 6, 2013
From: KIMURA, HAJIME
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 029762/0085 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2010
From: KIMURA, HAJIME
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 024336/0539 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 19, 2010
From: KIMURA, HAJIME
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 023959/0503 →
Priority Claims (1)
JP 2009-045574 · Feb 27, 2009 · national
Continuity (1)
Related Publication 20100220117A1 · Sep 2, 2010