LEAKAGE CURRENT CONTROL CIRCUIT

1 . A leakage current control circuit, comprising:

a solid state switch operable to control a flow of AC to a load, the switch exhibiting an AC leakage current in an OFF state;

a capacitor connected in parallel to the load, the capacitor being operable to repeatedly charge during a first half cycle of the leakage current and to discharge during a second half cycle of the leakage current, the capacitor charge including a DC component in response to the leakage current through the solid state switch being greater in a first direction than in a second direction opposite the first direction; and

a first resistor connected in parallel to the load, the capacitor and the first resistor preventing a voltage buildup across the load from exceeding a voltage threshold.

2 . The circuit of claim 1 , wherein the load is a lighting fixture having a parasitic capacitance when the solid state switch is in the OFF state and no lighting source is received into the light fixture, and wherein the voltage buildup is a parasitic capacitance voltage buildup.

3 . The circuit of claim 1 , wherein the capacitor is repeatedly charged during a first half cycle of the leakage current and discharged during a second half cycle of the leakage current in response to the leakage current through the solid state switch being greater in a first direction than in a second direction opposite the first direction.

4 . The circuit of claim 1 , wherein the capacitor limits an AC component of the voltage buildup and the first resistor limits a DC component of the voltage buildup.

5 . The circuit of claim 4 , the capacitor having a capacitance and the first resistor having a resistance, wherein a larger capacitance permits a smaller AC component, a smaller capacitance permits a larger AC component, a larger resistance permits a larger DC component, and a smaller resistance permits a smaller DC component.

6 . The circuit of claim 1 , the first resistor having a first resistance, the voltage control circuit including:

a second resistor connected in series with the capacitor, the second resistor having a second resistance less than the first resistance.

7 . The circuit of claim 6 , wherein the second resistor limits an amount of current that passes through the capacitor.

8 . The circuit of claim 6 , including:

an optocoupler connected in series with the second resistor and the capacitor, the optocoupler being operable to indicate a potential fault condition in response to the leakage current exceeding a predefined threshold or in response to the solid state switch being shorted ON.

9 . The circuit of claim 8 , including:

a third resistor connected to an output of the optocoupler, the third resistor being selected to generate a first logic signal when the optocoupler is OFF, and to generate a second logic signal opposite the first logic signal when the optocoupler is ON, the second logic signal indicating a potential fault condition.

10 . The circuit of claim 9 , including:

a microprocessor operable to command the solid state switch to turn ON or OFF; and

a comparator in communication with the microprocessor, the comparator being operable to receive the first or second logic signal, and being operable to indicate an actual fault indication in response to the solid state switch being in the OFF state and the second logic signal indicating a potential fault condition.

11 . The circuit of claim 1 , wherein the solid state switch is a MOSFET bi-directional switch.

12 . A method of controlling leakage current, comprising:

A) receiving an AC leakage current though a solid state switch in an OFF state, the switch being operable to control a flow of AC to a load;

B) repeatedly charging a capacitor during a first half cycle of the AC leakage current and discharging the capacitor during a second half cycle of the AC leakage current; and

C) passing current through a resistor connected in parallel to the capacitor and connected in parallel to the load, wherein steps (B)-(C) prevent a voltage buildup across the load from exceeding a voltage threshold.

13 . The method of claim 12 , wherein said steps (B)-(C) are performed in response to the leakage current through the solid state switch being greater in a first direction than in a second direction opposite the first direction.

14 . The method of claim 12 , wherein the load is a lighting fixture having a parasitic capacitance when the solid state switch is OFF and no lighting source is received into the light fixture, and wherein the voltage buildup is a parasitic capacitance voltage buildup.

15 . The method of claim 12 , including:

selecting the resistor to limit a DC component of the voltage buildup, such that a larger resistance permits a larger DC component and a smaller resistance permits a smaller DC component.

16 . The method of claim 12 , including:

selecting the capacitor to limit an AC component of the voltage buildup such that a larger capacitance permits a smaller AC component, a smaller capacitance permits a larger AC component.

17 . The method of claim 12 , including:

producing an output signal from an optocoupler to indicate a potential fault condition in response to the leakage current exceeding a predefined threshold.

18 . The method of claim 12 , the resistor being a first resistor having a first resistance, the method including:

connecting a second resistor in series with the capacitor to limit an amount of current that passes through the capacitor.

19 . The method of claim 18 , including:

connecting the optocoupler in series with the second resistor and the capacitor.