Nonvolatile semiconductor memory device and method of manufacturing the same
A memory string comprises: a first semiconductor layer having a plurality of columnar portions extending in a perpendicular direction with respect to a substrate, and joining portions joining lower ends of the plurality of columnar portions; a charge storage layer surrounding a side surface of the first semiconductor layer; and a first conductive layer surrounding a side surface of the charge storage layer and functioning as a control electrode of memory cells. A select transistor comprises: a second semiconductor layer extending upwardly from an upper surface of the columnar portions; an insulating layer surrounding a side surface of the second semiconductor layer; a second conductive layer surrounding a side surface of the insulating layer and functioning as a control electrode of the select transistors; and a third semiconductor layer formed on an upper surface of the second semiconductor layer and including silicon germanium.
1. A nonvolatile semiconductor memory device, comprising:
a plurality of memory strings each having a plurality of electrically rewritable memory cells connected in series; and
select transistors each connected to one of the ends of the memory strings,
each of the memory strings comprising:
a first semiconductor layer having a plurality of columnar portions extending in a perpendicular direction with respect to a substrate, and joining portions joining lower ends of the plurality of columnar portions;
a charge storage layer surrounding a side surface of the first semiconductor layer; and
a first conductive layer surrounding a side surface of the charge storage layer and functioning as a control electrode of the memory cells, and
each of the select transistors comprising:
a second semiconductor layer extending upwardly from an upper surface of the columnar portions;
an insulating layer surrounding a side surface of the second semiconductor layer;
a second conductive layer surrounding a side surface of the insulating layer and functioning as a control electrode of the select transistors; and
a third semiconductor layer formed on an upper surface of the second semiconductor layer and including silicon germanium.
2. The nonvolatile semiconductor memory device according to claim 1 ,
wherein the third semiconductor layer is positioned in a higher layer than an upper surface of the second conductive layer.
3. The nonvolatile semiconductor memory device according to claim 1 ,
wherein the first through third semiconductor layers include a hollow therein.
4. The nonvolatile semiconductor memory device according to claim 3 ,
wherein each of the memory strings and each of the select transistors further comprises an internal insulating layer formed so as to fill the hollow.
5. The nonvolatile semiconductor memory device according to claim 1 ,
wherein each of the select transistors further comprises a fourth semiconductor layer formed on an upper surface of the third semiconductor layer and including titanium germanide.
6. The nonvolatile semiconductor memory device according to claim 1 ,
wherein a concentration of germanium is large in an upper portion of the third semiconductor layer compared with other portions of the third semiconductor layer, and becomes smaller with increasing downward distance in the third semiconductor layer.
7. The nonvolatile semiconductor memory device according to claim 1 ,
wherein each of the memory strings comprises:
a tunnel insulating layer provided between the first semiconductor layer and the charge storage layer; and
a block insulating layer provided between the charge storage layer and the first conductive layer, and
wherein the insulating layer comprises:
a first insulating layer formed continuously in an integrated manner with the tunnel insulating layer; and
a second insulating layer formed continuously in an integrated manner with the block insulating layer.
8. A nonvolatile semiconductor memory device, comprising:
a plurality of memory strings each having a plurality of electrically rewritable memory cells connected in series; and
select transistors each connected to one of the ends of the memory strings,
each of the select transistors comprising:
a second semiconductor layer extending upwardly;
an insulating layer surrounding a side surface of the second semiconductor layer;
a second conductive layer surrounding a side surface of the insulating layer and functioning as a control electrode of the select transistors; and
a third semiconductor layer formed on an upper surface of the second semiconductor layer and including silicon germanium,
the third semiconductor layer being positioned in a higher layer than an upper surface of the second conductive layer.
9. The nonvolatile semiconductor memory device according to claim 8 ,
wherein the second semiconductor layer and the third semiconductor layer include a hollow therein.
10. The nonvolatile semiconductor memory device according to claim 9 ,
wherein each of the select transistors further comprises an internal insulating layer formed so as to fill the hollow.
11. The nonvolatile semiconductor memory device according to claim 8 ,
wherein each of the select transistors further comprises a fourth semiconductor layer formed on an upper surface of the third semiconductor layer and including titanium germanide.
12. The nonvolatile semiconductor memory device according to claim 8 ,
wherein a concentration of germanium is large in an upper portion of the third semiconductor layer compared with other portions of the third semiconductor layer, and becomes smaller with increasing downward distance in the third semiconductor layer.