METHOD OF FORMING POLYCRYSTALLINE SILICON LAYER

1 . A method of forming a polycrystalline silicon layer, the method comprising:

forming an amorphous silicon layer on a substrate by chemical vapor deposition (CVD) using a gas including a silicon atom and hydrogen gas; and

crystallizing the amorphous silicon layer into a polycrystalline silicon layer using a crystallization-inducing metal.

2 . The method of claim 1 , wherein a flow rate of the hydrogen gas is 3 to 7 times larger than a flow rate of the gas including the silicon atom.

3 . The method of claim 1 , wherein the crystallizing of the amorphous silicon layer into the polycrystalline silicon layer using the crystallization-inducing metal comprises:

forming a capping layer on the amorphous silicon layer;

forming a crystallization-inducing metal layer on the capping layer; and

annealing the substrate.

4 . The method of claim 1 , wherein the crystallizing of the amorphous silicon layer into the polycrystalline silicon layer using the crystallization-inducing metal comprises:

forming a crystallization-inducing metal layer on the substrate;

forming a capping layer on the crystallization-inducing metal layer;

forming the amorphous silicon layer on the capping layer; and

annealing the substrate.

5 . The method of claim 3 , wherein the crystallization-inducing metal layer is formed to have an areal density of 10 11 to 10 15 atoms/cm 2 .

6 . The method of claim 4 , wherein the crystallization-inducing metal layer is formed to have an areal density of 10 11 to 10 15 atoms/cm 2 .

7 . The method of claim 1 , wherein the crystallization-inducing metal is formed on the amorphous silicon layer by atomic layer deposition.

8 . The method of claim 1 , wherein the amorphous silicon layer is formed by plasma enhanced CVD.

9 . The method of claim 1 , wherein the gas including the silicon atom comprises monosilane (SiH 4 ) gas, disilane (Si 2 H 6 ) gas, tetrachlorosilane (SiCl 4 ) gas, dichlorosilane (SiH 2 Cl 2 ) gas, tetrafluorosilane (SiF 4 ) gas, or difluorosilane (SiH 2 F 2 ) gas, or combinations thereof.

10 . The method of claim 1 , wherein the forming of the amorphous silicon layer comprises:

forming the amorphous silicon layer to a thickness of about 300 to about 1000 Å.

11 . The method of claim 1 , further comprising:

forming a buffer layer on the substrate,

wherein the amorphous silicon layer is formed on the buffer layer.

12 . The method of claim 1 , wherein the amorphous silicon layer is formed by one of atmospheric pressure CVD, low pressure CVD, low temperature CVD, high temperature CVD, and plasma enhanced CVD.

13 . The method of claim 1 , wherein the crystallizing of the amorphous silicon layer comprises:

forming a crystallization-inducing metal layer on the amorphous silicon layer by sputtering, vapor phase deposition, ion beam deposition, electron beam deposition, laser ablation, or atomic layer deposition.

14 . The method of claim 1 , wherein the crystallizing of the amorphous silicon layer comprises:

metal-induced crystallization (MIC), metal-induced lateral crystallization (MILC), or super grain silicon (SGS) crystallization.

15 . The method of claim 1 , wherein the crystallization-inducing metal is Ni, Pd, Ti, Ag, Au, Sn, Sb, Cu, Co, Mo, Tb, Ru, Rh, Cd, Pt, or Al.

16 . The method of claim 1 , the crystallizing of the amorphous silicon layer comprises annealing the substrate and amorphous silicon layer at a temperature about 200 to about 900° C.

17 . The method of claim 1 , wherein the forming of the amorphous silicon layer comprises:

forming the amorphous silicon layer to a surface roughness of about 11.3 Å.

18 . A method of forming a thin film transistor, the method comprising:

forming an amorphous silicon layer on a substrate by chemical vapor deposition (CVD) using a gas including a silicon atom and hydrogen gas; and

crystallizing the amorphous silicon layer into a polycrystalline silicon layer using a crystallization-inducing metal;

patterning the polycrystalline silicon layer into a semiconductor layer;

forming a gate insulating layer on the semiconductor layer;

forming a gate electrode on the gate insulating layer above a channel region of the semiconductor layer;

forming an interlayer insulating layer to cover the gate electrode; and

forming source and drain electrode connected to source and drain regions, respectively, of the semiconductor layer.

19 . The method of claim 18 , wherein the gas including the silicon atom comprises monosilane (SiH 4 ) gas, disilane (Si 2 H 6 ) gas, tetrachlorosilane (SiCl 4 ) gas, dichlorosilane (SiH 2 Cl 2 ) gas, tetrafluorosilane (SiF 4 ) gas, or difluorosilane (SiH 2 F 2 ) gas, or combinations thereof.

20 . The method of claim 18 , wherein a flow rate of the hydrogen gas is 3 to 7 times larger than a flow rate of the gas including the silicon atom.