IP Library Granted Patent US 8,330,266
Granted Patent B2
US 8,330,266 · App. 12/721,067 · Granted Dec 11, 2012

Semiconductor device

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Quick Facts
Patent No.
US 8,330,266
App. No.
12/721,067
Granted
Dec 11, 2012
Kind
B2
Abstract

A semiconductor device includes: a first semiconductor device including an interconnect substrate having a cavity structure and a semiconductor element mounted on a bottom part of the cavity structure; and a second semiconductor device provided on and connected to the first semiconductor device via connection terminals. A sealing material is provided between the first semiconductor device and the second semiconductor device. A sloped portion is formed, at a corner portion at which the bottom part and a side wall of the cavity structure in the first semiconductor device meets, to be sloped toward a center part of the cavity structure and have a tapered shape which becomes continuously wider in the direction from an upper part to a lower part.

Claims (27)

1. A semiconductor device, comprising:

a first semiconductor device including an interconnect substrate having a cavity structure and a semiconductor element mounted on a bottom part of the cavity structure; and

a second semiconductor device provided on and connected to the first semiconductor device via connection terminals,

wherein

a sealing material is provided between the first semiconductor device and the second semiconductor device, and

a sloped portion is formed, at a corner portion at which the bottom part and a side wall of the cavity structure in the first semiconductor device meets, to be sloped toward a center part of the cavity structure and have a tapered shape which becomes continuously wider in the direction from an upper part to a lower part.

2. The semiconductor device of claim 1 , wherein

the sloped portion is made of resin.

3. The semiconductor device of claim 1 , wherein

the sloped portion is made of a material of which the interconnect substrate is formed.

4. The semiconductor device of claim 3 , wherein

the sloped portion is provided integrally with the interconnect substrate.

5. The semiconductor device of claim 1 , wherein

the semiconductor element is mounted on the bottom part of the cavity structure of the interconnect substrate via a connection material, and

the connection material is provided to reach the sloped portion.

6. The semiconductor device of claim 5 , wherein

the connection material is provided to further reach a side wall of the cavity structure.

7. The semiconductor device of claim 6 , wherein

the connection material is provided to further fill an opening part of the cavity structure.

8. The semiconductor device of claim 1 , wherein

a different material from the connection material is provided between the connection material and the sloped portion to reach the connection material and the sloped portion.

9. The semiconductor device of claim 8 , wherein

the different material from the connection material is provided to further reach a side wall of the cavity structure.

10. The semiconductor device of claim 9 , wherein

the different material from the connection material is provided to further fill an opening part of the cavity structure.

11. The semiconductor device of claim 1 , wherein

the same structure is provided between each of four sides of the semiconductor element and an associated one of side walls of the cavity structure.

Assignments (7)
CHANGE OF NAME Recorded Nov 19, 2025
From: TESSERA ADVANCED TECHNOLOGIES, INC.
To: ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.
Reel/Frame 073635/0304 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2016
From: PANNOVA SEMIC, LLC
To: TESSERA ADVANCED TECHNOLOGIES, INC.
Reel/Frame 037581/0466 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2010
From: YUI, TAKASHI
To: PANASONIC CORPORATION
Reel/Frame 024352/0376 →