SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided are a semiconductor device capable of reducing a difference in wiring resistance between paths from a gate pad to a gate electrode and capable of applying a gate voltage to the gate electrode more uniformly, and a method of manufacturing the semiconductor device. The semiconductor device according to an exemplary aspect of the present invention includes a gate pad supplied with a gate voltage applied to a gate electrode of each MOSFET cell disposed in an active region, a gate connection line connected to the gate pad, and a plurality of gate lead-out lines connected in parallel between the gate electrode and the gate connection line. Each of the plurality of gate lead-out lines has a resistance value that becomes smaller by every one or plural gate lead-out lines as the gate lead-out lines are located farther away from the gate pad.
1 . A semiconductor device comprising:
a gate pad supplied with a gate voltage applied to a gate electrode of a field-effect transistor disposed in an active region;
a gate connection line connected to the gate pad; and
a plurality of gate lead-out lines connected in parallel between the gate electrode and the gate connection line,
wherein each of the plurality of gate lead-out lines has a resistance value that becomes smaller by every one or plural gate lead-out lines as the gate lead-out lines are located farther away from the gate pad.
2 . The semiconductor device according to claim 1 , wherein the gate pad, the gate connection line, and the gate lead-out lines are made of polysilicon.
3 . The semiconductor device according to claim 2 , wherein impurities are introduced into the gate pad, the gate connection line, and the gate lead-out lines.
4 . The semiconductor device according to claim 1 , wherein the gate lead-out lines are formed at a higher density as the gate lead-out lines are located farther away from the gate pad.
5 . The semiconductor device according to claim 1 , wherein the gate lead-out lines have a larger width as the gate lead-out lines are located farther away from the gate pad.
6 . The semiconductor device according to claim 1 , wherein the gate lead-out lines have a smaller length as the gate lead-out lines are located farther away from the gate pad.
7 . The semiconductor device according to claim 3 , wherein the impurities introduced into the gate lead-out lines increase in concentration as the gate lead-out lines are located farther away from the gate pad.
8 . The semiconductor device according to claim 1 , the semiconductor device being fabricated on a semiconductor substrate made of silicon.
9 . The semiconductor device according to claim 1 , wherein the field-effect transistor is a MOSFET.