IP Library › Granted Patent US 8,049,650
Granted Patent B2
US 8,049,650 · App. 12/727,522 · Granted Nov 1, 2011

Method for testing a high-speed digital to analog converter based on an undersampling technique

Assignee: National Yunlin University of Science and Technology
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Quick Facts
Patent No.
US 8,049,650
App. No.
12/727,522
Granted
Nov 1, 2011
Kind
B2
Abstract

A method for testing a digital to analog converter, which operates in an undersampling environment, wherein signals of a tested DAC and a signal generator are modulated by a PWM device and then processed by a digital processing circuit to generate a digital signal, whereby is formed a low-speed equivalent ADC. The signal generator is provided by uniform-distribution random test patterns, and the signal generator generates an uniform-distribution random analog signal to the equivalent ADC. Thereby, the test error caused by the non-ideality of the signal generator is corrected, and the tested circuit can work in a full speed.

Claims (15)

1. A method for testing a high-speed digital to analog converter based on an undersampling technique, comprising:

providing a tested digital to analog converter integrated with a triangular pattern generator, a PWM device, a synchronous control circuit, a digital processing circuit, and a modulation circuit to form an equivalent analog to digital converter;

deducing a piecewise relationship of an input of a signal generator comprising a digital to analog converter and an output of the equivalent analog to digital converter;

the signal generator generating a uniform-distribution random analog output signal to the equivalent analog to digital converter;

collecting signals from an output terminal of the equivalent analog to digital converter, and substituting the signals into the piecewise relationship to obtain a transition voltage of the equivalent analog to digital converter;

calculating nonlinearity of the equivalent analog to digital converter to obtain a nonlinear error of the tested digital to analog converter;

deducing a test result of the tested digital-analog converter from the transition voltage and a nonlinear error of the equivalent analog to digital converter and the nonlinear error of the tested digital to analog converter.

2. The method for testing a high-speed digital to analog converter based on an undersampling technique according to claim 1 , wherein a triangular pattern generator generates signals to the tested digital to analog converter, and the tested digital to analog converter outputs an analog triangular wave signal functioning as a reference analog signal of the equivalent analog to digital converter; an input terminal of the equivalent analog to digital converter is connected to the signal generator; the signal generator receives uniform-distribution random patterns via the digital to analog converter and then generates the uniform-distribution random analog output signal; the analog output signal and the analog triangular wave signal are modulated by a pulse-width-modulation device, and processed by a synchronous control circuit, a digital processing circuit and a modulation circuit; the equivalent analog to digital converter then outputs an undersampling digital signal.

3. A method for testing a high-speed digital to analog converter, comprising:

providing a tested digital to analog converter integrated with a triangular pattern generator, a PWM device, a synchronous control circuit, a digital processing circuit, and a modulation circuit to form an equivalent analog to digital converter;

deducing a piecewise relationship of an input of a signal generator comprising a digital to analog converter and an output of the equivalent analog to digital converter;

the signal generator generating a uniform-distribution random analog output signal to the equivalent analog to digital converter;

collecting signals from an output terminal of the equivalent analog to digital converter, and substituting the signals into the piecewise relationship to obtain a transition voltage of the equivalent analog to digital converter;

calculating nonlinearity of the equivalent analog to digital converter to obtain a nonlinear error of the tested digital to analog converter;

deducing a test result of the tested digital-analog converter from the transition voltage and a nonlinear error of the equivalent analog to digital converter and the nonlinear error of the tested digital to analog converter.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2010
From: LIN, CHUN-WEI; HO, CHENG-EN
To: NATIONAL YUNLIN UNIVERSITY OF SCIENCE AND TECHNOLOGY
Reel/Frame 024109/0348 →
Continuity (1)
Related Publication 20110227769A1 · Sep 22, 2011