Semiconductor memory device

1. A semiconductor memory device comprising a plurality of memory cells on a semiconductor layer,

each of the memory cells comprising:

a source layer and a drain layer in the semiconductor layer;

an electrically floating body region provided in the semiconductor layer between the source layer and the drain layer and configured to accumulate or discharge electric charges in order to store logical data;

a gate dielectric film provided on the body region and comprising a ferroelectric film with polarization characteristics; and

a gate electrode provided on the gate dielectric film above the body region, wherein

each memory cell stores a plurality of logical data depending on an amount of electric charges accumulated in the body region and on a polarization state of the ferroelectric film.

2. The device of claim 1 , wherein the gate dielectric film is a laminated film comprising a first insulating film provided on the semiconductor layer and made of a paraelectric film and a second insulating film provided on the first insulating film and made of a ferroelectric film with polarization characteristics.

3. The device of claim 1 , wherein in a write operation of logical data, logical data is written in the ferroelectric film of the memory cell and then written in the body region of the memory cell.

4. The device of claim 2 , wherein in a write operation of logical data, logical data is written in the ferroelectric film of the memory cell and then written in the body region of the memory cell.

5. The device of claim 1 , wherein at a time of writing logical data in the ferroelectric film, first logical data is written in all ferroelectric films of the memory cells, and second logical data whose logic is opposite to that of the first logical data is then written in a ferroelectric film of a memory cell selected from the memory cells, and

at a time of writing logical data in the body region, the first logical data is written in all body regions of the memory cells, and then the second logical data is written in a body region of a memory cell selected from the memory cells.

6. The device of claim 2 , wherein at a time of writing logical data in the ferroelectric film, first logical data is written in all ferroelectric films of the memory cells, and second logical data whose logic is opposite to that of the first logical data is then written in a ferroelectric film of a memory cell selected from the memory cells, and

at a time of writing logical data in the body region, the first logical data is written in all body regions of the memory cells, and then the second logical data is written in a body region of a memory cell selected from the memory cells.

7. The device of claim 3 , wherein at a time of writing logical data in the ferroelectric film, first logical data is written in all ferroelectric films of the memory cells, and second logical data whose logic is opposite to that of the first logical data is then written in a ferroelectric film of a memory cell selected from the memory cells, and

at a time of writing logical data in the body region, the first logical data is written in all body regions of the memory cells, and then the second logical data is written in a body region of a memory cell selected from the memory cells.

8. The device of claim 1 , wherein periphery of a body region of each of the memory cells is surrounded by an element isolation region.

9. The device of claim 2 , wherein the first insulating film is made of a silicon oxide film, HfO 2 , Y 2 O 3 , HfSiON, HfSiO, Ta 2 O 5 , BaTiO 3 , BaZrO 3 , ZrO 2 , or Al 2 O 3 .

10. The device of claim 1 , wherein at a time of writing logical data in the ferroelectric film, first logical data is written in all ferroelectric films of the memory cells, and second logical data whose logic is opposite to that of the first logical data is then written in a ferroelectric film of a memory cell selected from the memory cells, and

at a time of writing logical data in the body region, the second logical data is written in all body regions of the memory cells, and then the first logical data is written in a body region of a memory cell selected from the memory cells.

11. The device of claim 2 , wherein at a time of writing logical data in the ferroelectric film, first logical data is written in all ferroelectric films of the memory cells, and second logical data whose logic is opposite to that of the first logical data is then written in a ferroelectric film of a memory cell selected from the memory cells, and

at a time of writing logical data in the body region, the second logical data is written in all body regions of the memory cells, and then the first logical data is written in a body region of a memory cell selected from the memory cells.

12. The device of claim 3 , wherein at a time of writing logical data in the ferroelectric film, first logical data is written in all ferroelectric films of the memory cells, and second logical data whose logic is opposite to that of the first logical data is then written in a ferroelectric film of a memory cell selected from the memory cells, and

at a time of writing logical data in the body region, the second logical data is written in all body regions of the memory cells, and then the first logical data is written in a body region of a memory cell selected from the memory cells.