DMA CONTROLLER, INFORMATION PROCESSING DEVICE AND DMA MANAGEMENT METHOD
A DMA controller includes an information manager and a signal generator. The information manager manages individual information by grouping the information according to grouping of a DMA transfer corresponding to relativity between the DMA transfer individually executed. The individual information corresponds to individual DMA transfer. The signal generator generates a signal based on the individual information managed by the information manager. The signal indicates a completion of the DMA transfer in group of the DMA transfer. It is possible to prevent redundant information from being transmitted through the bus by informing a CPU of completion of the DMA transfer in a unit of group.
1 . A DMA (Direct Memory Access) controller comprising:
an information manager which manages individual information by grouping the information according to grouping of a DMA transfer corresponding to relativity between the DMA transfers individually executed, the individual information corresponding to individual DMA transfer; and
a signal generator which generates a signal based on the individual information managed by the information manager, the signal indicating a completion of the DMA transfer in a unit of group of the DMA transfer.
2 . The DMA controller according to claim 1 , wherein the individual information includes a status value, the status value indicating a transfer state of the DMA transfer, and
the signal generator detects the completion of the DMA transfer in a unit of group of the DMA transfer based on the status value.
3 . The DMA controller according to claim 2 , wherein the signal generator updates the status value managed by the information manager based on information, the information indicating the completion of the DMA transfer transferred through a bus.
4 . The DMA controller according to claim 1 , wherein the information managers determines continuity of the DMA transfer which is a comparison target based on continuity between one start address and the other end address.
5 . The DMA controller according to claim 2 , wherein the information managers determines continuity of the DMA transfer which is a comparison target based on continuity between one start address and the other end address.
6 . The DMA controller according to claim 3 , wherein the information managers determines continuity of the DMA transfer which is a comparison target based on continuity between one start address and the other end address.
7 . The DMA controller according to claim 1 , wherein the information manager determines relativity of the DMA transfer which is a comparison target based on a result comparing transfer direction and the other transfer direction.
8 . The DMA controller according to claim 2 , wherein the information manager determines relativity of the DMA transfer which is a comparison target based on a result comparing transfer direction and the other transfer direction.
9 . The DMA controller according to claim 3 , wherein the information manager determines relativity of the DMA transfer which is a comparison target based on a result comparing transfer direction and the other transfer direction.
10 . The DMA controller according to claim 4 , wherein the individual information includes an end address of the DMA transfer.
11 . The DMA controller according to claim 7 , wherein the individual information includes information indicating a transfer direction of the DMA transfer.
12 . The DMA controller according to claim 1 , wherein the information manager includes a plurality of memory areas, the plurality of the memory areas storing the individual information in a unit of group of the DMA transfer.
13 . The DMA controller according to claim 1 , further comprising an information obtain unit which obtains or generates information based on a transfer command specifying the DMA transfer, the information indicating a start address defined the DMA transfer, an end address and a transfer direction, the information obtain unit further outputting the information to the information manager.
14 . An information processing device comprising:
a CPU (Central Processing Unit);
a memory; and
a DMA controller connected to the CPU and the memory through a bus,
wherein the DMA controller comprising:
an information manager which manages individual information by grouping the information according to grouping of the DMA transfer corresponding to relativity between the DMA transfers individually executed; and
a signal generator which generates a signal based on the individual information managed by the information manager, the signal notifying the CPU of a completion of the DMA transfer in a unit of group of the DMA transfer.
15 . A DMA managing method comprising:
storing individual information corresponding to individual DMA transfer in common memory area according to grouping of the DMA transfer corresponding to relativity between the DMA transfers individually executed; and
generating a signal based on the individual information stored in the memory area, the signal indicating a completion of the DMA transfer in a unit of group of the DMA transfer.