IP Library Patent Application 12753961
Patent Application
App. No. 12/753,961

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

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Quick Facts
Patent No.
US None
App. No.
12/753,961
Abstract

A semiconductor device according to the present invention having a vertical MOSFET that includes a first trench that is formed in a semiconductor substrate and includes a gate electrode of the vertical MOSFET embedded therein with a gate insulating film interposed therebetween, a second trench that is connected with the first trench and has a trench width wider than the first trench, a gate pad that is connected with the gate electrode and formed to a sidewall of the second trench with the gate insulating film interposed therebetween, and a gate line that is connected with a sidewall of the gate pad and electrically connects with the gate electrode via the gate pad.

Claims (19)

1 . A semiconductor device including a vertical MOSFET comprising:

a first trench formed in a semiconductor substrate and including a gate electrode of the vertical MOSFET embedded therein with a gate insulating film interposed therebetween;

a second trench connected with the first trench and having a trench width wider than the first trench;

a gate pad connected with the gate electrode and formed to a sidewall of the second trench with the gate insulating film interposed therebetween; and

a gate line connected with a sidewall of the gate pad and electrically connected with the gate electrode via the gate pad.

2 . The semiconductor device according to claim 1 , further comprising an interlayer dielectric formed over the semiconductor substrate and including a contact hole that reaches the gate insulating film of a bottom surface of the second trench and the sidewall of the gate pad,

wherein the gate line is formed to fill inside the second trench from above the interlayer dielectric.

3 . The semiconductor device according to claim 1 , wherein the gate electrode and the gate pad are formed of polysilicon.

4 . The semiconductor device according to claim 1 , wherein the gate electrode and the gate pad are formed of polysilicon with a polycide surface.

5 . A method of manufacturing a semiconductor device including a vertical MOSFET, the method comprising:

forming a first trench and a second trench in a semiconductor substrate, the second trench being connected with the first trench and including a trench width wider than the first trench;

forming a gate insulating film that covers a surface inside the first trench and a surface inside the second trench;

forming a gate electrode and a gate pad, the gate electrode being embedded inside the first trench with the gate insulating film interposed therebetween, and the gate pad being provided to a sidewall of the second trench with the gate insulating film interposed therebetween; and

forming a gate line that connects with a sidewall of the gate pad.

6 . The method of manufacturing a semiconductor device according to claim 5 , wherein the gate electrode and the gate pad are formed by depositing a conductive layer for forming the gate electrode of the vertical MOSFET over the gate insulating film and then etching back the conductive layer.

7 . The method of manufacturing a semiconductor device according to claim 6 , wherein the conductive layer is polysilicon.

8 . The method of manufacturing a semiconductor device according to claim 7 , further comprising turning a surface of the polysilicon into polycide after the etchback of the conductive layer.

9 . The method of manufacturing a semiconductor device according to claim 5 , further comprising forming an interlayer dielectric before forming the gate line, the interlayer dielectric including a contact hole that reaches the gate insulating film of a bottom surface of the second trench and a sidewall of the gate pad,

wherein the gate line is connected with the sidewall of the gate pad by forming the gate line to fill inside the second trench from above the interlayer dielectric.

Assignments (2)
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025194/0905 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 5, 2010
From: KANEKO, ATSUSHI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024183/0933 →