IP Library Granted Patent US 8,319,318
Granted Patent B2
US 8,319,318 · App. 12/755,201 · Granted Nov 27, 2012

Forming metal filled die back-side film for electromagnetic interference shielding with coreless packages

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Quick Facts
Patent No.
US 8,319,318
App. No.
12/755,201
Granted
Nov 27, 2012
Kind
B2
Abstract

Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a cavity in a carrier material, attaching a die in the cavity, wherein a backside of the die comprises a metal filled DBF, forming a dielectric material adjacent the die and on a bottom side of the carrier material, forming a coreless substrate by building up layers on the dielectric material, and removing the carrier material from the coreless substrate.

Claims (25)

1. A structure comprising:

a die embedded in a coreless substrate, wherein the coreless substrate includes; a dielectric material adjacent the die, and wherein the dielectric material includes a fillet portion;

die pad interconnect structures disposed in a die pad area of the die; and

a DBF disposed on a backside of the die, wherein a top surface of the DBF is coplanar with a top surface of the fillet portion.

2. The structure of claim 1 wherein the DBF comprises an EMI shield.

3. The structure of claim 1 wherein the coreless substrate comprises a portion of a coreless bumpless buildup package structure.

4. The structure of claim 1 wherein the DBF comprises an adhesive.

5. The structure of claim 1 wherein the DBF comprises metallic filler particles.

6. The structure of claim 5 wherein metallic filler particles comprise at least one of copper and silver.

7. The structure of claim 5 wherein the metallic filler particles comprise a particle size of less than about 10 microns.

8. A structure comprising:

a die embedded in a coreless substrate, wherein the coreless substrate includes a dielectric material adjacent the die, and wherein the dielectric material includes a fillet portion;

a DBF is disposed on a backside of the die, wherein a top surface of the DBF is coplanar with a top surface of the fillet portion;

die pad interconnect structures disposed in a die pad area of the die; and

vias in the coreless substrate disposed in a non-die area that are connected to PoP lands, wherein the PoP lands are disposed within the coreless substrate adjacent the die, and wherein a top surface of the PoP lands is coplanar with a top surface of the coreless substrate.

9. The structure of claim 7 wherein the DBF comprises an EMI shield.

10. The structure of claim 7 wherein the coreless substrate comprises a portion of a coreless bumpless buildup package structure.

11. The structure of claim 10 wherein the die is fully embedded in the coreless bumpless buildup package.

12. The structure of claim 11 wherein a portion of the DBF is embedded in the coreless bumpless buildup package.

13. The structure of claim 7 wherein the DBF comprises metallic particles.

14. The structure of claim 13 wherein the coreless bumpless buildup package comprises RF components.

15. The structure of claim 8 further comprising a system comprising:

a bus is communicatively coupled to the structure; and

a DRAM communicatively coupled to the bus.

16. The structure of claim 8 wherein the DBF comprises a glass cloth backbone.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →