INFORMATION PROCESSING APPARATUS AND IMAGE FORMING APPARATUS
An information processing apparatus includes a processing unit and a control unit connected with the processing unit through a transmission line. The processing unit has multiple devices including a predetermined low-speed device. The control unit has a processing circuit that issues access to the multiple devices of the processing unit, and the processing unit has a communication circuit that receives the access to the multiple devices through the transmission line and a queue that buffers the access, when the received access is to the predetermined low-speed device.
1 . An information processing apparatus comprising:
a processing unit having multiple devices including a predetermined low-speed device; and
a control unit connected with the processing unit through a transmission line;
wherein the control unit has a processing circuit that issues access to the multiple devices of the processing unit, and
wherein the processing unit has (a) a communication circuit that receives the access to the multiple devices through the transmission line and (b) a queue that buffers the access when the received access is to the predetermined low-speed device.
2 . The information processing apparatus according to claim 1 , wherein the processing unit has a notification circuit that monitors a usage rate of the queue and that transmits a notification to the control unit when the access to the predetermined low-speed device is stored at a rate that exceeds a predetermined rate of a capacity of the queue; and
wherein upon receiving the notification, the control unit prohibits issuing access to the predetermined low-speed device.
3 . The information processing apparatus according to claim 2 , wherein upon receiving the notification, the processing circuit in the control unit prohibits issuing access to the predetermined low-speed device.
4 . The information processing apparatus according to claim 2 , wherein the control unit has a blocking circuit, and wherein, upon the control unit receiving the notification, the blocking circuit blocks access to the predetermined low-speed device.
5 . The information processing apparatus according to claim 1 , wherein one of the multiple devices comprises a main memory, and wherein the processing unit has a queuing circuit that queues in the main memory a further access to the predetermined low-speed device received after the queue is filled with the access to the predetermined low-speed device.
6 . The information processing apparatus according to claim 1 , wherein one of the multiple devices comprises a main memory having a storage section that stores a number of stages used in the queue.
7 . The information processing apparatus according to claim 6 , wherein the storage section stores a maximum value of the number of stages used in the queue.
8 . The information processing apparatus according to claim 6 , wherein the storage section is reset before predetermined processing is executed, and is referenced after the predetermined processing is executed.
9 . An image forming apparatus comprising:
an image processing unit having multiple devices, including a predetermined low-speed device, for processing an image;
an image forming unit that forms the processed image on a predetermined recording medium; and
a control unit connected with the image processing unit through a transmission line and having a processing circuit that issues access to the multiple devices of the image processing unit;
wherein the image processing unit has (a) a communication circuit that receives the access to the multiple devices through the transmission line and (b) a queue that buffers the access when the received access is to the predetermined low-speed device.
10 . The image forming apparatus according to claim 9 , wherein the image processing unit has a notification circuit that monitors a usage rate of the queue and that transmits a notification to the control unit when the access to the predetermined low-speed device is stored at a rate that exceeds a predetermined rate of a capacity of the queue; and
wherein upon receiving the notification, the control unit prohibits issuing access to the predetermined low-speed device.
11 . The image forming apparatus according to claim 10 , wherein upon receiving the notification, the processing circuit in the control unit prohibits issuing access to the predetermined low-speed device.
12 . The image forming apparatus according to claim 10 , wherein the control unit has a blocking circuit, and wherein, upon the control unit receiving the notification, the blocking circuit blocks access to the predetermined low-speed device.
13 . The image forming apparatus according to claim 9 , wherein one of the multiple devices comprises a main memory, and wherein the image processing unit has a queuing circuit that queues in the main memory a further access to the predetermined low-speed device received after the queue is filled with the access to the predetermined low-speed device.
14 . The image forming apparatus according to claim 9 , wherein one of the multiple devices comprises a main memory having a storage section that stores a number of stages used in the queue.
15 . The image forming apparatus according to claim 14 , wherein the storage section stores a maximum value of the number of stages used in the queue.
16 . The image forming apparatus according to claim 14 , wherein the storage section is reset before predetermined processing is executed, and is referenced after the predetermined processing is executed.
17 . An information processing method comprising the steps of:
issuing access to multiple devices of a processing unit connected with a control unit through a transmission line, the multiple devices including a predetermined low-speed device;
receiving the access to the multiple devices through the transmission line; and
buffering the access when the received access is to the predetermined low-speed device.
18 . The information processing method according to claim 17 , further comprising:
monitoring a rate at which the access is buffered; and
prohibiting access to the predetermined low-speed device when the access to the predetermined low-speed device is buffered at a rate that exceeds a predetermined capacity.
19 . The information processing method according to claim 17 , wherein the buffering is performed using a FIFO queue, and wherein one of the multiple devices comprises a main memory having a storage section that stores a number of stages used in the queue.
20 . The information processing method according to claim 19 , further comprising:
resetting the storage section before predetermined processing is executed; and
referencing the storage section after the predetermined processing is executed.