IP Library Granted Patent US 8,351,168
Granted Patent B2
US 8,351,168 · App. 12/768,283 · Granted Jan 8, 2013

Open circuit detector and method therefore

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Quick Facts
Patent No.
US 8,351,168
App. No.
12/768,283
Granted
Jan 8, 2013
Kind
B2
Abstract

A circuit comprises a switch, a driver circuit, and an open circuit detector. The switch has a first current electrode coupled to a power supply terminal, a second current electrode coupled to supply a current to a load, and a control electrode. The driver circuit has an input for receiving a control signal, and an output coupled to the control electrode of the switch. The open circuit detector has a first terminal coupled to receive a voltage from a bootstrap capacitor, a second terminal coupled to the power supply terminal, and a control terminal coupled to the driver circuit. The open circuit detector detects an open circuit, and in response, provides a signal at the control terminal for causing the driver circuit to open the switch.

Claims (65)

1. A circuit comprising:

a switch having a first current electrode coupled to a power supply terminal, a second current electrode coupled to supply a current to a load, and a control electrode;

a driver circuit having an input for receiving a control signal, and an output coupled to the control electrode of the switch; and

an open circuit detector having a first terminal coupled to receive a voltage from a bootstrap capacitor, a second terminal coupled to the power supply terminal, and a control terminal coupled to the driver circuit, the open circuit detector for detecting an open circuit, and in response, providing a signal at the control terminal for causing the driver circuit to open the switch,

wherein the open circuit detector comprises:

a first current source having a first terminal coupled to the power supply terminal, and a second terminal;

a second current source having a first terminal coupled to the power supply terminal, and a second terminal;

a first resistor having a first terminal coupled to the second terminal of the second current source, and a second terminal;

a first transistor having a first current electrode coupled to the second terminal of the first resistor, a second current electrode, and a control electrode coupled to the second terminal of the first current source; and

a second resistor having a first terminal control electrode of the first transistor, and a second terminal coupled to the second current electrode of the first transistor.

2. The circuit of claim 1 , wherein the switch is further characterized as being a high side switch for controlling an electric motor.

3. The circuit of claim 1 wherein the open circuit detector is supplied by the bootstrap capacitor when the open circuit is detected.

4. The circuit of claim 1 , wherein the open circuit detector further comprises:

a second transistor having a first current electrode, a control electrode coupled to the second current electrode of the switch, and a second current electrode coupled to the first terminal of the first resistor; and

a current mirror having an input coupled to the first current electrode of the second transistor, and an output for providing the signal at the control terminal.

5. The circuit of claim 4 , wherein the second transistor is characterized as being a bipolar transistor.

6. A circuit comprising:

a switch having a first current electrode coupled to a power supply terminal, a second current electrode coupled to supply a current to a load, and a control electrode;

a driver circuit having an input for receiving a control signal, and an output coupled to the control electrode of the switch; and

an open circuit detector having a first terminal coupled to receive a voltage from a bootstrap capacitor, a second terminal coupled to the power supply terminal, and a control terminal coupled to the driver circuit, the open circuit detector for detecting an open circuit, and in response, providing a signal at the control terminal for causing the driver circuit to open the switch,

wherein the open circuit detector comprises:

a first current source having a first terminal, and a second terminal;

a second current source having a first terminal, and a second terminal coupled to the second terminal;

a capacitor having a first plate electrode coupled to the first terminal of the first current source, and a second plate electrode coupled to the first terminal of the second current source;

a resistor having a first terminal coupled to the power supply terminal, and a second terminal coupled to the first terminal of the second current source; and

a transistor having a first current electrode, a control electrode coupled to the first plate electrode of the capacitor, and a second current electrode coupled to the power supply terminal.

7. The circuit of claim 6 , wherein the open circuit detector comprises:

a first current mirror having a first terminal coupled to the first current electrode of the transistor, and a second terminal;

a latch having an input coupled to the second terminal of the first current mirror, and an output for providing the signal to the control terminal of the open circuit detector; and

a delay element coupled to the latch, the delay element for preventing the latch from providing the signal until after a predetermined delay.

8. The circuit of claim 1 , wherein the open circuit is a loss of ground.

9. The circuit of claim 6 , wherein the switch is further characterized as being a high side switch for controlling an electric motor.

10. The circuit of claim 6 wherein the open circuit detector is supplied by the bootstrap capacitor when the open circuit is detected.

11. The circuit of claim 6 , wherein the open circuit is a loss of ground.

12. A circuit comprising:

a power transistor having a first current electrode coupled to a power supply terminal, a second current electrode coupled to supply a current to a load, and a control electrode;

a driver circuit having an input for receiving a control signal, and an output coupled to the control electrode of the power transistor; and

an open circuit detector having a first terminal coupled to receive a voltage from a bootstrap capacitor, a second terminal coupled to the power supply terminal, and a control terminal coupled to the driver circuit, the open circuit detector for detecting an open ground in the driver circuit, and in response, providing a signal at the control terminal for causing the driver circuit to turn off the power transistor, wherein the open circuit detector comprises:

a first transistor having a first current electrode, a control electrode, and a second current electrode;

a first resistor having a first terminal, and a second terminal coupled to the first current electrode of the first transistor;

a second resistor having a first terminal coupled to the control terminal of the first transistor, and a second terminal coupled to the second current electrode of the first transistor;

a second transistor having a first current electrode, a control electrode coupled to the second current electrode of the power transistor, and a second current electrode coupled to the first terminal of the first resistor; and

a current mirror having an input coupled to the first current electrode of the second transistor, and an output for providing the signal at the control terminal.

13. The circuit of claim 12 , wherein the open circuit detector provides an alternate current path to ground in response to detecting the open ground in the driver circuit.

14. The circuit of claim 12 , wherein the second transistor is a bipolar transistor.

15. A circuit comprising:

a power transistor having a first current electrode coupled to a power supply terminal, a second current electrode coupled to supply a current to a load, and a control electrode;

a driver circuit having an input for receiving a control signal, and an output coupled to the control electrode of the power transistor; and

an open circuit detector having a first terminal coupled to receive a voltage from a bootstrap capacitor, a second terminal coupled to the power supply terminal, and a control terminal coupled to the driver circuit, the open circuit detector for detecting an open ground in the driver circuit, and in response, providing a signal at the control terminal for causing the driver circuit to turn off the power transistor, wherein the open circuit detector comprises:

a first transistor having a first current electrode, a control electrode, and a second current electrode;

a capacitor having a first plate electrode coupled to the control electrode, and a second plate electrode;

a current mirror having an input coupled to the first current electrode of the first transistor, and an output;

a latch having an input coupled to the output of the current mirror, and an output for providing the signal at the control terminal; and

a delay circuit coupled to prevent the latch from providing the signal until after a predetermined delay.

16. The circuit of claim 15 , wherein the open circuit detector provides a current path from the bootstrap capacitor to the power supply terminal in response to detecting the open ground in the driver circuit.

17. In a circuit for driving a control electrode of a power transistor, a method for detecting an open circuit, the method comprising:

providing an alternate current path in response to detecting the open circuit;

supplying a current to the alternate current path using a voltage stored by a bootstrap capacitor; and

providing a control voltage in response to the current, the control voltage for causing the power transistor to turn,

wherein the providing the control voltage further comprises:

mirroring the current to provide a mirrored current; and

latching the control voltage in response to the mirrored current.

18. The method of claim 17 , wherein detecting the open circuit further comprises detecting an open ground.

19. The method of claim 17 , further comprising delaying the latching for a predetermined time period.

20. The method of claim 19 , wherein the predetermined time period is a time period required to discharge a capacitor.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0477 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2010
From: SICARD, THIERRY
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 024295/0992 →